1 /*
2 * Copyright (C) 2018-2019 ARM Limited. All rights reserved.
3 *
4 * Copyright (C) 2008 The Android Open Source Project
5 *
6 * Licensed under the Apache License, Version 2.0 (the "License");
7 * you may not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * http://www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an "AS IS" BASIS,
14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18 #include <inttypes.h>
19 #include "gralloc_helper.h"
20 #include "mali_gralloc_formats.h"
21 #include "format_info.h"
22
23 #include <unordered_map>
24 #include <mutex>
25
26 /* Default width aligned to whole pixel (CPU access). */
27 #define ALIGN_W_CPU_DEFAULT .align_w_cpu = 1
28
29 /*
30 * Format table, containing format properties.
31 *
32 * NOTE: This table should only be used within
33 * the gralloc library and not by clients directly.
34 */
35 const format_info_t formats[] = {
36
37 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGB_565, .npln = 1, .ncmp = 3, .bps = 6, .bpp_afbc = { 16, 0, 0 }, .bpp = { 16, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = true, .is_yuv = false, .afbc = true, .linear = true, .yuv_transform = true, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_RGB_565" },
38 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGB_888, .npln = 1, .ncmp = 3, .bps = 8, .bpp_afbc = { 24, 0, 0 }, .bpp = { 24, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = true, .is_yuv = false, .afbc = true, .linear = true, .yuv_transform = true, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_RGB_888" },
39 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBA_8888, .npln = 1, .ncmp = 4, .bps = 8, .bpp_afbc = { 32, 0, 0 }, .bpp = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_size = 1, .has_alpha = true, .is_rgb = true, .is_yuv = false, .afbc = true, .linear = true, .yuv_transform = true, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_RGBA_8888" },
40 { .id = MALI_GRALLOC_FORMAT_INTERNAL_BGRA_8888, .npln = 1, .ncmp = 4, .bps = 8, .bpp_afbc = { 32, 0, 0 }, .bpp = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_size = 1, .has_alpha = true, .is_rgb = true, .is_yuv = false, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_BGRA_8888" },
41 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBX_8888, .npln = 1, .ncmp = 3, .bps = 8, .bpp_afbc = { 32, 0, 0 }, .bpp = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = true, .is_yuv = false, .afbc = true, .linear = true, .yuv_transform = true, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_RGBX_8888" },
42 #if PLATFORM_SDK_VERSION >= 26
43 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBA_1010102, .npln = 1, .ncmp = 4, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_size = 1, .has_alpha = true, .is_rgb = true, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = true, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_RGBA_1010102" },
44 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBA_16161616, .npln = 1, .ncmp = 4, .bps = 16, .bpp_afbc = { 0, 0, 0 }, .bpp = { 64, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_size = 1, .has_alpha = true, .is_rgb = true, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_RGBA_16161616" },
45 #endif /* PLATFORM_SDK_VERSION >= 26 */
46
47 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y8, .npln = 1, .ncmp = 1, .bps = 8, .bpp_afbc = { 8, 0, 0 }, .bpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .align_w = 2, .align_h = 2, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_Y8" },
48 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y16, .npln = 1, .ncmp = 1, .bps = 16, .bpp_afbc = { 16, 0, 0 }, .bpp = { 16, 0, 0 }, .hsub = 1, .vsub = 1, .align_w = 2, .align_h = 2, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_Y16" },
49
50 /* 420 (8-bit) */
51 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YUV420_8BIT_I, .npln = 1, .ncmp = 3, .bps = 8, .bpp_afbc = { 12, 0, 0 }, .bpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = false, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_YUV420_8BIT_I" },
52 { .id = MALI_GRALLOC_FORMAT_INTERNAL_NV12, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 8, 16, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_NV12" },
53 { .id = MALI_GRALLOC_FORMAT_INTERNAL_NV21, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 8, 16, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_NV21" },
54 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YV12, .npln = 3, .ncmp = 3, .bps = 8, .bpp_afbc = { 8, 8, 8 }, .bpp = { 8, 8, 8 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_YV12" },
55
56 /* 422 (8-bit) */
57 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YUV422_8BIT, .npln = 1, .ncmp = 3, .bps = 8, .bpp_afbc = { 16, 0, 0 }, .bpp = { 16, 0, 0 }, .hsub = 2, .vsub = 1, .align_w = 2, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_YUV422_8BIT" },
58 { .id = MALI_GRALLOC_FORMAT_INTERNAL_NV16, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 8, 16, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 1, .align_w = 2, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_NV16" },
59
60 /* 420 (10-bit) */
61 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YUV420_10BIT_I, .npln = 1, .ncmp = 3, .bps = 10, .bpp_afbc = { 15, 0, 0 }, .bpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = false, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_YUV420_10BIT_I" },
62 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y0L2, .npln = 1, .ncmp = 4, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 0, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 2, .has_alpha = true, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_Y0L2" },
63 { .id = MALI_GRALLOC_FORMAT_INTERNAL_P010, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 10, 20, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_P010" },
64
65 /* 422 (10-bit) */
66 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y210, .npln = 1, .ncmp = 3, .bps = 10, .bpp_afbc = { 20, 0, 0 }, .bpp = { 32, 0, 0 }, .hsub = 2, .vsub = 1, .align_w = 2, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_Y210" },
67 { .id = MALI_GRALLOC_FORMAT_INTERNAL_P210, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 10, 20, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 1, .align_w = 2, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_P210" },
68
69 /* 444 (10-bit) */
70 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YUV444_10BIT_I, .npln = 1, .ncmp = 3, .bps = 10, .bpp_afbc = { 30, 0, 0 }, .bpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1, .align_w = 1, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = true, .linear = false, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_YUV444_10BIT_I" },
71 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y410, .npln = 1, .ncmp = 4, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 32, 0, 0 }, .hsub = 1, .vsub = 1, .align_w = 1, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = true, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_Y410" },
72
73 /* Other */
74 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW16, .npln = 1, .ncmp = 1, .bps = 16, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 2, .align_h = 2, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_RAW16" },
75 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW12, .npln = 1, .ncmp = 1, .bps = 12, .bpp_afbc = { 0, 0, 0 }, .bpp = { 12, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 4, .align_h = 2, .align_w_cpu = 4, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_RAW12" },
76 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW10, .npln = 1, .ncmp = 1, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 10, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 4, .align_h = 2, .align_w_cpu = 4, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_RAW10" },
77 { .id = MALI_GRALLOC_FORMAT_INTERNAL_BLOB, .npln = 1, .ncmp = 1, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 1, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_BLOB" },
78
79 #if PLATFORM_SDK_VERSION >= 28
80 /* Depth and Stencil */
81 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_16, .npln = 1, .ncmp = 1, .bps = 16, .bpp_afbc = { 0, 0, 0}, .bpp = { 16, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 1, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_16" },
82 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_24, .npln = 1, .ncmp = 1, .bps = 24, .bpp_afbc = { 0, 0, 0 }, .bpp = { 24, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 1, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_24" },
83 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_24_STENCIL_8, .npln = 1, .ncmp = 2, .bps = 24, .bpp_afbc = { 0, 0, 0 }, .bpp = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 1, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_24_STENCIL_8" },
84 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_32F, .npln = 1, .ncmp = 1, .bps = 32, .bpp_afbc = { 0, 0, 0 }, .bpp = { 32, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 1, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_32F" },
85 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_32F_STENCIL_8, .npln = 1, .ncmp = 2, .bps = 32, .bpp_afbc = { 0, 0, 0 }, .bpp = { 40, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 1, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_32F_STENCIL_8" },
86 { .id = MALI_GRALLOC_FORMAT_INTERNAL_STENCIL_8, .npln = 1, .ncmp = 1, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 1, .align_h = 1, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = false, .afbc = false, .linear = true, .yuv_transform = false, .flex = false, .planes_contiguous = false, .name = "MALI_GRALLOC_FORMAT_INTERNAL_STENCIL_8" },
87 #endif
88 /* Exynos Formats */
89 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M" },
90 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_FULL, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_FULL" },
91 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M" },
92 { .id = HAL_PIXEL_FORMAT_EXYNOS_YV12_M, .npln = 3, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 8, 8 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YV12_M" },
93 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P_M, .npln = 3, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 8, 8 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P_M" },
94 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_S10B, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_S10B" },
95 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_TILED, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 16,.has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_TILED" },
96 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN" },
97 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_S10B, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_S10B" },
98 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_P010_M, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_P010_M" },
99 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P, .npln = 3, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 8, 8 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P" },
100 { .id = HAL_PIXEL_FORMAT_YCrCb_420_SP, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_YCrCb_420_SP" },
101
102 /* SBWC Formats */
103 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC" },
104 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC" },
105 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC" },
106 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC" },
107 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_SBWC, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_SBWC" },
108 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_10B_SBWC, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_10B_SBWC" },
109 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L50, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L50" },
110 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L75, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L75" },
111 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L50, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L50" },
112 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L75, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L75" },
113 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L40, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L40" },
114 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L60, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L60" },
115 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L80, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L80" },
116 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L40, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L40" },
117 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L60, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L60" },
118 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L80, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 2, .align_h = 2, ALIGN_W_CPU_DEFAULT, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L80" },
119
120 /* Google Formats */
121 { .id = HAL_PIXEL_FORMAT_GOOGLE_NV12_SP, .npln = 2, .ncmp = 3, .bps = 8, .bpp_afbc = { 0, 0, 0 }, .bpp = { 8, 16, 0 }, .hsub = 2, .vsub = 2, .align_w = 64, .align_h = 8, .align_w_cpu = 64, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = true, .name = "HAL_PIXEL_FORMAT_GOOGLE_NV12_SP" },
122 { .id = HAL_PIXEL_FORMAT_GOOGLE_NV12_SP_10B, .npln = 2, .ncmp = 3, .bps = 10, .bpp_afbc = { 0, 0, 0 }, .bpp = { 16, 32, 0 }, .hsub = 2, .vsub = 2, .align_w = 64, .align_h = 8, .align_w_cpu = 64, .tile_size = 1, .has_alpha = false, .is_rgb = false, .is_yuv = true, .afbc = false, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = true, .name = "HAL_PIXEL_FORMAT_GOOGLE_NV12_SP_10B" },
123 { .id = HAL_PIXEL_FORMAT_GOOGLE_R_8, .npln = 1, .ncmp = 1, .bps = 8, .bpp_afbc = { 8, 0, 0 }, .bpp = { 8, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = true, .is_yuv = false, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_GOOGLE_R_8" },
124 { .id = HAL_PIXEL_FORMAT_GOOGLE_RG_88, .npln = 1, .ncmp = 2, .bps = 8, .bpp_afbc = { 16, 0, 0 }, .bpp = { 16, 0, 0 }, .hsub = 0, .vsub = 0, .align_w = 16, .align_h = 16, .align_w_cpu = 16, .tile_size = 1, .has_alpha = false, .is_rgb = true, .is_yuv = false, .afbc = true, .linear = true, .yuv_transform = false, .flex = true, .planes_contiguous = false, .name = "HAL_PIXEL_FORMAT_GOOGLE_RG_88" },
125
126 };
127
128 const size_t num_formats = sizeof(formats)/sizeof(formats[0]);
129
130
131 #define S_LIN F_LIN
132 #define S_AFBC F_AFBC
133
134 /* This table represents the superset of flags for each base format and producer/consumer.
135 * Where IP does not support a capability, it should be defined and not set.
136 */
137 const format_ip_support_t formats_ip_support[] = {
138
139 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGB_565, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN | F_AFBC, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_LIN | S_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
140 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGB_888, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN | F_AFBC, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_LIN, .dpu_rd = F_LIN | F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
141 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBA_8888, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN | F_AFBC, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_LIN, .dpu_rd = F_LIN | F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
142 { .id = MALI_GRALLOC_FORMAT_INTERNAL_BGRA_8888, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = S_LIN, .gpu_rd = S_LIN, .dpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
143 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBX_8888, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = S_LIN | S_AFBC, .gpu_rd = S_LIN | S_AFBC, .dpu_wr = F_LIN, .dpu_rd = F_LIN | S_AFBC, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
144 #if PLATFORM_SDK_VERSION >= 26
145 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBA_1010102, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN | F_AFBC, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
146 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RGBA_16161616, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN, .gpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
147 #endif /* PLATFORM_SDK_VERSION >= 26 */
148
149 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y8, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
150 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y16, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
151
152 /* 420 (8-bit) */
153 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YUV420_8BIT_I, .cpu_wr = F_NONE, .cpu_rd = F_NONE, .gpu_wr = F_NONE, .gpu_rd = F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_AFBC, .vpu_rd = F_AFBC},
154 { .id = MALI_GRALLOC_FORMAT_INTERNAL_NV12, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
155 { .id = MALI_GRALLOC_FORMAT_INTERNAL_NV21, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = S_LIN, .gpu_rd = S_LIN, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
156 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YV12, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN, .gpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
157
158 /* 422 (8-bit) */
159 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YUV422_8BIT, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN | F_AFBC, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_LIN | F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
160 { .id = MALI_GRALLOC_FORMAT_INTERNAL_NV16, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
161
162 /* 420 (10-bit) */
163 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YUV420_10BIT_I, .cpu_wr = F_NONE, .cpu_rd = F_NONE, .gpu_wr = F_AFBC, .gpu_rd = F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_AFBC, .dpu_aeu_wr = F_AFBC, .vpu_wr = F_AFBC, .vpu_rd = F_AFBC},
164 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y0L2, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN, .gpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
165 { .id = MALI_GRALLOC_FORMAT_INTERNAL_P010, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN, .gpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
166
167 /* 422 (10-bit) */
168 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y210, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN | F_AFBC, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
169 { .id = MALI_GRALLOC_FORMAT_INTERNAL_P210, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN, .gpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
170
171 /* 444 (10-bit) */
172 { .id = MALI_GRALLOC_FORMAT_INTERNAL_YUV444_10BIT_I, .cpu_wr = F_NONE, .cpu_rd = F_NONE, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
173 { .id = MALI_GRALLOC_FORMAT_INTERNAL_Y410, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN | F_AFBC, .gpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
174
175 /* Other */
176 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW16, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
177 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW12, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
178 { .id = MALI_GRALLOC_FORMAT_INTERNAL_RAW10, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
179 { .id = MALI_GRALLOC_FORMAT_INTERNAL_BLOB, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN, .gpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
180
181 #if PLATFORM_SDK_VERSION >= 28
182 /* Depth and Stencil */
183 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_16, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
184 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_24, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
185 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_24_STENCIL_8, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
186 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_32F, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
187 { .id = MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_32F_STENCIL_8, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
188 { .id = MALI_GRALLOC_FORMAT_INTERNAL_STENCIL_8, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_NONE, .gpu_rd = F_NONE, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
189 #endif
190 /* Exynos Formats */
191 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
192 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_FULL, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
193 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
194 { .id = HAL_PIXEL_FORMAT_EXYNOS_YV12_M, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
195 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P_M, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
196 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_S10B, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
197 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_TILED, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
198 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
199 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_S10B, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
200 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_P010_M, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
201 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN, .gpu_rd = F_LIN, .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
202 { .id = HAL_PIXEL_FORMAT_YCrCb_420_SP, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = S_LIN, .gpu_rd = S_LIN, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
203
204 /* SBWC Formats */
205 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
206 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
207 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
208 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
209 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_SBWC, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
210 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_10B_SBWC, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
211
212 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L50, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
213 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L75, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
214 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L50, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
215 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L75, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
216 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L40, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
217 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L60, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
218 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L80, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
219 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L40, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
220 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L60, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
221 { .id = HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L80, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_NONE, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
222 { .id = HAL_PIXEL_FORMAT_GOOGLE_NV12_SP, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
223 { .id = HAL_PIXEL_FORMAT_GOOGLE_NV12_SP_10B, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN , .gpu_rd = F_LIN , .dpu_wr = F_LIN, .dpu_rd = F_LIN, .dpu_aeu_wr = F_NONE, .vpu_wr = F_LIN, .vpu_rd = F_LIN},
224 { .id = HAL_PIXEL_FORMAT_GOOGLE_R_8, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN | F_AFBC, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_NONE, .vpu_rd = F_NONE},
225 { .id = HAL_PIXEL_FORMAT_GOOGLE_RG_88, .cpu_wr = F_LIN, .cpu_rd = F_LIN, .gpu_wr = F_LIN | F_AFBC, .gpu_rd = F_LIN | F_AFBC, .dpu_wr = F_NONE, .dpu_rd = F_NONE, .dpu_aeu_wr = F_NONE, .vpu_wr = F_NONE, .vpu_rd = F_NONE},
226 };
227
228 const size_t num_ip_formats = sizeof(formats_ip_support)/sizeof(formats_ip_support[0]);
229
230 typedef struct
231 {
232 uint32_t hal_format;
233 bool is_flex;
234 uint32_t internal_format;
235 } hal_int_fmt;
236
237
238 static const hal_int_fmt hal_to_internal_format[] =
239 {
240 { HAL_PIXEL_FORMAT_RGBA_8888, false, MALI_GRALLOC_FORMAT_INTERNAL_RGBA_8888 },
241 { HAL_PIXEL_FORMAT_RGBX_8888, false, MALI_GRALLOC_FORMAT_INTERNAL_RGBX_8888 },
242 { HAL_PIXEL_FORMAT_RGB_888, false, MALI_GRALLOC_FORMAT_INTERNAL_RGB_888 },
243 { HAL_PIXEL_FORMAT_RGB_565, false, MALI_GRALLOC_FORMAT_INTERNAL_RGB_565 },
244 { HAL_PIXEL_FORMAT_BGRA_8888, false, MALI_GRALLOC_FORMAT_INTERNAL_BGRA_8888 },
245 { HAL_PIXEL_FORMAT_YCbCr_422_SP, false, MALI_GRALLOC_FORMAT_INTERNAL_NV16 },
246 { HAL_PIXEL_FORMAT_YCrCb_420_SP, false, MALI_GRALLOC_FORMAT_INTERNAL_NV21 },
247 { HAL_PIXEL_FORMAT_YCbCr_422_I, false, MALI_GRALLOC_FORMAT_INTERNAL_YUV422_8BIT },
248 #if PLATFORM_SDK_VERSION >= 26
249 { HAL_PIXEL_FORMAT_RGBA_FP16, false, MALI_GRALLOC_FORMAT_INTERNAL_RGBA_16161616 },
250 #endif
251 { HAL_PIXEL_FORMAT_RAW16, false, MALI_GRALLOC_FORMAT_INTERNAL_RAW16 },
252 { HAL_PIXEL_FORMAT_BLOB, false, MALI_GRALLOC_FORMAT_INTERNAL_BLOB },
253 { HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED, true, MALI_GRALLOC_FORMAT_INTERNAL_NV12 },
254 { HAL_PIXEL_FORMAT_YCbCr_420_888, true, MALI_GRALLOC_FORMAT_INTERNAL_NV12 },
255 { HAL_PIXEL_FORMAT_RAW_OPAQUE, false, MALI_GRALLOC_FORMAT_INTERNAL_UNDEFINED },
256 { HAL_PIXEL_FORMAT_RAW10, false, MALI_GRALLOC_FORMAT_INTERNAL_RAW10 },
257 { HAL_PIXEL_FORMAT_RAW12, false, MALI_GRALLOC_FORMAT_INTERNAL_RAW12 },
258 { HAL_PIXEL_FORMAT_YCbCr_422_888, true, MALI_GRALLOC_FORMAT_INTERNAL_YUV422_8BIT },
259 { HAL_PIXEL_FORMAT_YCbCr_444_888, true, MALI_GRALLOC_FORMAT_INTERNAL_UNDEFINED },
260 { HAL_PIXEL_FORMAT_FLEX_RGB_888, true, MALI_GRALLOC_FORMAT_INTERNAL_UNDEFINED },
261 { HAL_PIXEL_FORMAT_FLEX_RGBA_8888, true, MALI_GRALLOC_FORMAT_INTERNAL_UNDEFINED },
262 #if PLATFORM_SDK_VERSION >= 26
263 { HAL_PIXEL_FORMAT_RGBA_1010102, false, MALI_GRALLOC_FORMAT_INTERNAL_RGBA_1010102 },
264 #endif
265 #if PLATFORM_SDK_VERSION >= 28
266 { HAL_PIXEL_FORMAT_DEPTH_16, false, MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_16 },
267 { HAL_PIXEL_FORMAT_DEPTH_24, false, MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_24 },
268 { HAL_PIXEL_FORMAT_DEPTH_24_STENCIL_8, false, MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_24_STENCIL_8 },
269 { HAL_PIXEL_FORMAT_DEPTH_32F, false, MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_32F },
270 { HAL_PIXEL_FORMAT_DEPTH_32F_STENCIL_8, false, MALI_GRALLOC_FORMAT_INTERNAL_DEPTH_32F_STENCIL_8 },
271 { HAL_PIXEL_FORMAT_STENCIL_8, false, MALI_GRALLOC_FORMAT_INTERNAL_STENCIL_8 },
272 { HAL_PIXEL_FORMAT_YCBCR_P010, false, MALI_GRALLOC_FORMAT_INTERNAL_P010 },
273 #endif
274 { HAL_PIXEL_FORMAT_Y8, false, MALI_GRALLOC_FORMAT_INTERNAL_Y8 },
275 { HAL_PIXEL_FORMAT_Y16, false, MALI_GRALLOC_FORMAT_INTERNAL_Y16 },
276 { HAL_PIXEL_FORMAT_YV12, false, MALI_GRALLOC_FORMAT_INTERNAL_YV12 },
277 /* Exynos Formats */
278 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP, true, MALI_GRALLOC_FORMAT_INTERNAL_NV12 },
279 { HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M, false, HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M },
280 { HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_FULL, false, HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_FULL },
281 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M },
282 { HAL_PIXEL_FORMAT_EXYNOS_YV12_M, false, HAL_PIXEL_FORMAT_EXYNOS_YV12_M },
283 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P_M, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P_M },
284 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_S10B, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_S10B },
285 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_TILED, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_TILED},
286 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN },
287 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_S10B, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_S10B },
288 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_P010_M, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_P010_M },
289 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P },
290 /* SBWC Formats */
291 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC },
292 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC },
293 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC },
294 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC },
295 { HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_SBWC, false, HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_SBWC },
296 { HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_10B_SBWC, false, HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_10B_SBWC },
297
298 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L50, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L50 },
299 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L75, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L75 },
300 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L50, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L50 },
301 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L75, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L75 },
302 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L40, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L40 },
303 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L60, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L60 },
304 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L80, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L80 },
305 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L40, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L40 },
306 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L60, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L60 },
307 { HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L80, false, HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L80 },
308 { HAL_PIXEL_FORMAT_GOOGLE_NV12_SP, true, HAL_PIXEL_FORMAT_GOOGLE_NV12_SP },
309 { HAL_PIXEL_FORMAT_GOOGLE_NV12_SP_10B, true, HAL_PIXEL_FORMAT_GOOGLE_NV12_SP_10B },
310 { HAL_PIXEL_FORMAT_GOOGLE_R_8, false, HAL_PIXEL_FORMAT_GOOGLE_R_8 },
311 { HAL_PIXEL_FORMAT_GOOGLE_RG_88, false, HAL_PIXEL_FORMAT_GOOGLE_RG_88 },
312 };
313
314 const size_t num_hal_formats = sizeof(hal_to_internal_format)/sizeof(hal_to_internal_format[0]);
315
316
317 /*
318 * Finds "Look-up Table" index for the given format
319 *
320 * @param base_format [in] Format for which index is required.
321 *
322 * @return index, when the format is found in the look up table
323 * -1, otherwise
324 *
325 */
get_format_index(const uint32_t base_format)326 int32_t get_format_index(const uint32_t base_format)
327 {
328 int32_t format_idx;
329 for (format_idx = 0; format_idx < (int32_t)num_formats; format_idx++)
330 {
331 if (formats[format_idx].id == base_format)
332 {
333 break;
334 }
335 }
336 if (format_idx >= (int32_t)num_formats)
337 {
338 ALOGE("ERROR: Format allocation info not found for format: %" PRIx32, base_format);
339 return -1;
340 }
341
342 return format_idx;
343 }
344
345
get_ip_format_index(const uint32_t base_format)346 int32_t get_ip_format_index(const uint32_t base_format)
347 {
348 int32_t format_idx;
349 for (format_idx = 0; format_idx < (int32_t)num_ip_formats; format_idx++)
350 {
351 if (formats_ip_support[format_idx].id == base_format)
352 {
353 break;
354 }
355 }
356 if (format_idx >= (int32_t)num_ip_formats)
357 {
358 ALOGE("ERROR: IP support not found for format: %" PRIx32, base_format);
359 return -1;
360 }
361
362 return format_idx;
363 }
364
365
366 /*
367 * Attempt to map base HAL format to an internal format and
368 * validate format is supported for allocation.
369 *
370 * @param map_to_internal [in] 1: Forces mapping to (and validation of) internal format
371 * 0: Only maps flex HAL formats to internal
372 *
373 * @return internal_format, where internal format is found
374 * HAL format, where map_to_internal == 0 and base_format is not flex
375 * MALI_GRALLOC_FORMAT_INTERNAL_UNDEFINED, otherwise
376 *
377 * NOTE: Base format might be either a HAL format or (already) an internal format.
378 *
379 */
get_internal_format(const uint32_t base_format,const bool map_to_internal)380 uint32_t get_internal_format(const uint32_t base_format, const bool map_to_internal)
381 {
382 uint32_t internal_format = base_format;
383
384 if (is_exynos_format(internal_format))
385 goto out;
386
387 for (int idx = 0; idx < (int)num_hal_formats; idx++)
388 {
389 if (hal_to_internal_format[idx].hal_format == base_format)
390 {
391 if (hal_to_internal_format[idx].is_flex || map_to_internal)
392 {
393 internal_format = hal_to_internal_format[idx].internal_format;
394 }
395 break;
396 }
397 }
398
399 /* Ensure internal format is valid when expected. */
400 if (map_to_internal && get_format_index(internal_format) < 0)
401 {
402 internal_format = MALI_GRALLOC_FORMAT_INTERNAL_UNDEFINED;
403 }
404
405 out:
406 return internal_format;
407 }
408
409
is_power2(uint8_t n)410 bool is_power2(uint8_t n)
411 {
412 return ((n & (n-1)) == 0);
413 }
414
415
sanitize_formats(void)416 bool sanitize_formats(void)
417 {
418 bool fail = false;
419
420 for (int i = 0; i < (int)num_formats; i++)
421 {
422 const format_info_t * format = &formats[i];
423
424 /* Identify invalid values. */
425 if (format->id == 0 ||
426 format->npln == 0 || format->npln > 3 ||
427 format->ncmp == 0 ||
428 format->bps == 0 ||
429 format->align_w == 0 ||
430 format->align_h == 0 ||
431 format->align_w_cpu == 0 ||
432 format->tile_size == 0)
433 {
434 AERR("Format [id:0x%" PRIx32 "] property zero/out of range (unexpected)", format->id);
435 fail = true;
436 }
437
438 if (format->is_rgb && format->is_yuv)
439 {
440 AERR("Format [id:0x%" PRIx32 "] cannot be both RGB and YUV", format->id);
441 fail = true;
442 }
443
444 if (format->npln > format->ncmp)
445 {
446 AERR("Format [id:0x%" PRIx32 "] planes cannot exceed components", format->id);
447 fail = true;
448 }
449
450 if (format->linear && (format->bps > format->bpp[0]))
451 {
452 AERR("Format [id:0x%" PRIx32 "] bpp should be greater than/equal to bps", format->id);
453 fail = true;
454 }
455
456 if (format->afbc && (format->bps > format->bpp_afbc[0]))
457 {
458 AERR("Format [id:0x%" PRIx32 "] bpp_afbc should be greater than/equal to bps", format->id);
459 fail = true;
460 }
461
462 if (!format->linear && format->tile_size > 1)
463 {
464 AERR("Format [id:0x%" PRIx32 "] tile_size must be set to 1 for formats without linear support", format->id);
465 fail = true;
466 }
467
468 for (int pln = 0; pln < 3; pln++)
469 {
470 if (format->linear && (pln < format->npln) && (format->bpp[pln] == 0))
471 {
472 AERR("Format [id:0x%" PRIx32 "] does not have bpp defined for plane: %d", format->id, pln);
473 fail = true;
474 }
475 else if (format->linear && (pln >= format->npln) && (format->bpp[pln] != 0))
476 {
477 AERR("Format [id:0x%" PRIx32 "] should not have bpp defined for plane: %d", format->id, pln);
478 fail = true;
479 }
480 else if (!format->linear && (format->bpp[pln] != 0))
481 {
482 AERR("Format [id:0x%" PRIx32 "] which doesn't support linear should not have bpp defined", format->id);
483 fail = true;
484 }
485
486 if (format->afbc && (pln < format->npln) && (format->bpp_afbc[pln] == 0))
487 {
488 AERR("Format [id:0x%" PRIx32 "] does not have bpp_afbc defined for plane: %d", format->id, pln);
489 fail = true;
490 }
491 else if (format->afbc && (pln >= format->npln) && (format->bpp_afbc[pln] != 0))
492 {
493 AERR("Format [id:0x%" PRIx32 "] should not have bpp_afbc defined for plane: %d", format->id, pln);
494 fail = true;
495 }
496 }
497
498 if (format->is_yuv)
499 {
500 if (format->hsub == 0 || format->vsub == 0)
501 {
502 AERR("Format [id:0x%" PRIx32 "] hsub and vsub should be non-zero (YUV)", format->id);
503 fail = true;
504 }
505
506 if (!is_power2(format->hsub) || !is_power2(format->vsub))
507 {
508 AERR("Format [id:0x%" PRIx32 "] hsub and vsub should be powers of 2", format->id);
509 fail = true;
510 }
511
512 if ((format->align_w % format->hsub) != 0)
513 {
514 AERR("Format [id:0x%" PRIx32 "] align_w should be a multiple of hsub", format->id);
515 fail = true;
516 }
517
518 if ((format->align_h % format->vsub) != 0)
519 {
520 AERR("Format [id:0x%" PRIx32 "] align_h should be a multiple of vsub", format->id);
521 fail = true;
522 }
523 }
524 else
525 {
526 if (format->hsub != 0 || format->vsub != 0)
527 {
528 AERR("Format [id:0x%" PRIx32 "] hsub and vsub should be zero (non-YUV)", format->id);
529 fail = true;
530 }
531 }
532
533 if (format->align_w == 0 || format->align_h == 0)
534 {
535 AERR("Format [id:0x%" PRIx32 "] align_w and align_h should be non-zero", format->id);
536 fail = true;
537 }
538 else
539 {
540 if (!is_power2(format->align_w) || !is_power2(format->align_h))
541 {
542 AERR("Format [id:0x%" PRIx32 "] align_w and align_h should be powers of 2", format->id);
543 fail = true;
544 }
545
546 if (!is_power2(format->align_w_cpu))
547 {
548 AERR("Format [id:0x%" PRIx32 "] align_w_cpu should be a power of 2", format->id);
549 fail = true;
550 }
551 }
552 }
553
554 return fail;
555 }
556
format_name(uint32_t base_format)557 const char *format_name(uint32_t base_format) {
558 static std::once_flag name_map_flag;
559 using NameMap = std::unordered_map<uint32_t, const char*>;
560 static NameMap name_map;
561
562 std::call_once(name_map_flag, []() {
563 for (size_t i = 0; i < num_formats; ++i) {
564 const format_info_t &format = formats[i];
565 if (name_map.count(format.id)) {
566 AERR("Format id 0x%" PRIx32 " mapped to %s and to %s",
567 format.id, name_map[format.id], format.name);
568 } else {
569 name_map[format.id] = format.name;
570 }
571 }
572 });
573
574 NameMap::const_iterator i = name_map.find(base_format);
575 if (i == name_map.end()) {
576 return "<unrecognized format>";
577 }
578 return i->second;
579 }
580
is_exynos_format(uint32_t base_format)581 bool is_exynos_format(uint32_t base_format)
582 {
583 switch (base_format)
584 {
585 case HAL_PIXEL_FORMAT_YCrCb_420_SP:
586 case HAL_PIXEL_FORMAT_EXYNOS_YV12_M:
587 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P:
588 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_P_M:
589 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_TILED:
590 case HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M:
591 case HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_FULL:
592 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M:
593 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN:
594 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_S10B:
595 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_S10B:
596 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_P010_M:
597 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC:
598 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC:
599 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC:
600 case HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_SBWC:
601 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC:
602 case HAL_PIXEL_FORMAT_EXYNOS_YCrCb_420_SP_M_10B_SBWC:
603 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L50:
604 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_SBWC_L75:
605 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L50:
606 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_SBWC_L75:
607 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L40:
608 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L60:
609 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SP_M_10B_SBWC_L80:
610 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L40:
611 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L60:
612 case HAL_PIXEL_FORMAT_EXYNOS_YCbCr_420_SPN_10B_SBWC_L80:
613 return true;
614 }
615
616 return false;
617 }
618