1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI_LINUX_ETHTOOL_H 20 #define _UAPI_LINUX_ETHTOOL_H 21 #include <linux/const.h> 22 #include <linux/types.h> 23 #include <linux/if_ether.h> 24 #include <limits.h> 25 struct ethtool_cmd { 26 __u32 cmd; 27 __u32 supported; 28 __u32 advertising; 29 __u16 speed; 30 __u8 duplex; 31 __u8 port; 32 __u8 phy_address; 33 __u8 transceiver; 34 __u8 autoneg; 35 __u8 mdio_support; 36 __u32 maxtxpkt; 37 __u32 maxrxpkt; 38 __u16 speed_hi; 39 __u8 eth_tp_mdix; 40 __u8 eth_tp_mdix_ctrl; 41 __u32 lp_advertising; 42 __u32 reserved[2]; 43 }; 44 #define ETH_MDIO_SUPPORTS_C22 1 45 #define ETH_MDIO_SUPPORTS_C45 2 46 #define ETHTOOL_FWVERS_LEN 32 47 #define ETHTOOL_BUSINFO_LEN 32 48 #define ETHTOOL_EROMVERS_LEN 32 49 struct ethtool_drvinfo { 50 __u32 cmd; 51 char driver[32]; 52 char version[32]; 53 char fw_version[ETHTOOL_FWVERS_LEN]; 54 char bus_info[ETHTOOL_BUSINFO_LEN]; 55 char erom_version[ETHTOOL_EROMVERS_LEN]; 56 char reserved2[12]; 57 __u32 n_priv_flags; 58 __u32 n_stats; 59 __u32 testinfo_len; 60 __u32 eedump_len; 61 __u32 regdump_len; 62 }; 63 #define SOPASS_MAX 6 64 struct ethtool_wolinfo { 65 __u32 cmd; 66 __u32 supported; 67 __u32 wolopts; 68 __u8 sopass[SOPASS_MAX]; 69 }; 70 struct ethtool_value { 71 __u32 cmd; 72 __u32 data; 73 }; 74 #define PFC_STORM_PREVENTION_AUTO 0xffff 75 #define PFC_STORM_PREVENTION_DISABLE 0 76 enum tunable_id { 77 ETHTOOL_ID_UNSPEC, 78 ETHTOOL_RX_COPYBREAK, 79 ETHTOOL_TX_COPYBREAK, 80 ETHTOOL_PFC_PREVENTION_TOUT, 81 __ETHTOOL_TUNABLE_COUNT, 82 }; 83 enum tunable_type_id { 84 ETHTOOL_TUNABLE_UNSPEC, 85 ETHTOOL_TUNABLE_U8, 86 ETHTOOL_TUNABLE_U16, 87 ETHTOOL_TUNABLE_U32, 88 ETHTOOL_TUNABLE_U64, 89 ETHTOOL_TUNABLE_STRING, 90 ETHTOOL_TUNABLE_S8, 91 ETHTOOL_TUNABLE_S16, 92 ETHTOOL_TUNABLE_S32, 93 ETHTOOL_TUNABLE_S64, 94 }; 95 struct ethtool_tunable { 96 __u32 cmd; 97 __u32 id; 98 __u32 type_id; 99 __u32 len; 100 void * data[0]; 101 }; 102 #define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff 103 #define DOWNSHIFT_DEV_DISABLE 0 104 #define ETHTOOL_PHY_FAST_LINK_DOWN_ON 0 105 #define ETHTOOL_PHY_FAST_LINK_DOWN_OFF 0xff 106 #define ETHTOOL_PHY_EDPD_DFLT_TX_MSECS 0xffff 107 #define ETHTOOL_PHY_EDPD_NO_TX 0xfffe 108 #define ETHTOOL_PHY_EDPD_DISABLE 0 109 enum phy_tunable_id { 110 ETHTOOL_PHY_ID_UNSPEC, 111 ETHTOOL_PHY_DOWNSHIFT, 112 ETHTOOL_PHY_FAST_LINK_DOWN, 113 ETHTOOL_PHY_EDPD, 114 __ETHTOOL_PHY_TUNABLE_COUNT, 115 }; 116 struct ethtool_regs { 117 __u32 cmd; 118 __u32 version; 119 __u32 len; 120 __u8 data[0]; 121 }; 122 struct ethtool_eeprom { 123 __u32 cmd; 124 __u32 magic; 125 __u32 offset; 126 __u32 len; 127 __u8 data[0]; 128 }; 129 struct ethtool_eee { 130 __u32 cmd; 131 __u32 supported; 132 __u32 advertised; 133 __u32 lp_advertised; 134 __u32 eee_active; 135 __u32 eee_enabled; 136 __u32 tx_lpi_enabled; 137 __u32 tx_lpi_timer; 138 __u32 reserved[2]; 139 }; 140 struct ethtool_modinfo { 141 __u32 cmd; 142 __u32 type; 143 __u32 eeprom_len; 144 __u32 reserved[8]; 145 }; 146 struct ethtool_coalesce { 147 __u32 cmd; 148 __u32 rx_coalesce_usecs; 149 __u32 rx_max_coalesced_frames; 150 __u32 rx_coalesce_usecs_irq; 151 __u32 rx_max_coalesced_frames_irq; 152 __u32 tx_coalesce_usecs; 153 __u32 tx_max_coalesced_frames; 154 __u32 tx_coalesce_usecs_irq; 155 __u32 tx_max_coalesced_frames_irq; 156 __u32 stats_block_coalesce_usecs; 157 __u32 use_adaptive_rx_coalesce; 158 __u32 use_adaptive_tx_coalesce; 159 __u32 pkt_rate_low; 160 __u32 rx_coalesce_usecs_low; 161 __u32 rx_max_coalesced_frames_low; 162 __u32 tx_coalesce_usecs_low; 163 __u32 tx_max_coalesced_frames_low; 164 __u32 pkt_rate_high; 165 __u32 rx_coalesce_usecs_high; 166 __u32 rx_max_coalesced_frames_high; 167 __u32 tx_coalesce_usecs_high; 168 __u32 tx_max_coalesced_frames_high; 169 __u32 rate_sample_interval; 170 }; 171 struct ethtool_ringparam { 172 __u32 cmd; 173 __u32 rx_max_pending; 174 __u32 rx_mini_max_pending; 175 __u32 rx_jumbo_max_pending; 176 __u32 tx_max_pending; 177 __u32 rx_pending; 178 __u32 rx_mini_pending; 179 __u32 rx_jumbo_pending; 180 __u32 tx_pending; 181 }; 182 struct ethtool_channels { 183 __u32 cmd; 184 __u32 max_rx; 185 __u32 max_tx; 186 __u32 max_other; 187 __u32 max_combined; 188 __u32 rx_count; 189 __u32 tx_count; 190 __u32 other_count; 191 __u32 combined_count; 192 }; 193 struct ethtool_pauseparam { 194 __u32 cmd; 195 __u32 autoneg; 196 __u32 rx_pause; 197 __u32 tx_pause; 198 }; 199 enum ethtool_link_ext_state { 200 ETHTOOL_LINK_EXT_STATE_AUTONEG, 201 ETHTOOL_LINK_EXT_STATE_LINK_TRAINING_FAILURE, 202 ETHTOOL_LINK_EXT_STATE_LINK_LOGICAL_MISMATCH, 203 ETHTOOL_LINK_EXT_STATE_BAD_SIGNAL_INTEGRITY, 204 ETHTOOL_LINK_EXT_STATE_NO_CABLE, 205 ETHTOOL_LINK_EXT_STATE_CABLE_ISSUE, 206 ETHTOOL_LINK_EXT_STATE_EEPROM_ISSUE, 207 ETHTOOL_LINK_EXT_STATE_CALIBRATION_FAILURE, 208 ETHTOOL_LINK_EXT_STATE_POWER_BUDGET_EXCEEDED, 209 ETHTOOL_LINK_EXT_STATE_OVERHEAT, 210 }; 211 enum ethtool_link_ext_substate_autoneg { 212 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED = 1, 213 ETHTOOL_LINK_EXT_SUBSTATE_AN_ACK_NOT_RECEIVED, 214 ETHTOOL_LINK_EXT_SUBSTATE_AN_NEXT_PAGE_EXCHANGE_FAILED, 215 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_PARTNER_DETECTED_FORCE_MODE, 216 ETHTOOL_LINK_EXT_SUBSTATE_AN_FEC_MISMATCH_DURING_OVERRIDE, 217 ETHTOOL_LINK_EXT_SUBSTATE_AN_NO_HCD, 218 }; 219 enum ethtool_link_ext_substate_link_training { 220 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_FRAME_LOCK_NOT_ACQUIRED = 1, 221 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_INHIBIT_TIMEOUT, 222 ETHTOOL_LINK_EXT_SUBSTATE_LT_KR_LINK_PARTNER_DID_NOT_SET_RECEIVER_READY, 223 ETHTOOL_LINK_EXT_SUBSTATE_LT_REMOTE_FAULT, 224 }; 225 enum ethtool_link_ext_substate_link_logical_mismatch { 226 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_BLOCK_LOCK = 1, 227 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_ACQUIRE_AM_LOCK, 228 ETHTOOL_LINK_EXT_SUBSTATE_LLM_PCS_DID_NOT_GET_ALIGN_STATUS, 229 ETHTOOL_LINK_EXT_SUBSTATE_LLM_FC_FEC_IS_NOT_LOCKED, 230 ETHTOOL_LINK_EXT_SUBSTATE_LLM_RS_FEC_IS_NOT_LOCKED, 231 }; 232 enum ethtool_link_ext_substate_bad_signal_integrity { 233 ETHTOOL_LINK_EXT_SUBSTATE_BSI_LARGE_NUMBER_OF_PHYSICAL_ERRORS = 1, 234 ETHTOOL_LINK_EXT_SUBSTATE_BSI_UNSUPPORTED_RATE, 235 }; 236 enum ethtool_link_ext_substate_cable_issue { 237 ETHTOOL_LINK_EXT_SUBSTATE_CI_UNSUPPORTED_CABLE = 1, 238 ETHTOOL_LINK_EXT_SUBSTATE_CI_CABLE_TEST_FAILURE, 239 }; 240 #define ETH_GSTRING_LEN 32 241 enum ethtool_stringset { 242 ETH_SS_TEST = 0, 243 ETH_SS_STATS, 244 ETH_SS_PRIV_FLAGS, 245 ETH_SS_NTUPLE_FILTERS, 246 ETH_SS_FEATURES, 247 ETH_SS_RSS_HASH_FUNCS, 248 ETH_SS_TUNABLES, 249 ETH_SS_PHY_STATS, 250 ETH_SS_PHY_TUNABLES, 251 ETH_SS_LINK_MODES, 252 ETH_SS_MSG_CLASSES, 253 ETH_SS_WOL_MODES, 254 ETH_SS_SOF_TIMESTAMPING, 255 ETH_SS_TS_TX_TYPES, 256 ETH_SS_TS_RX_FILTERS, 257 ETH_SS_UDP_TUNNEL_TYPES, 258 ETH_SS_COUNT 259 }; 260 struct ethtool_gstrings { 261 __u32 cmd; 262 __u32 string_set; 263 __u32 len; 264 __u8 data[0]; 265 }; 266 struct ethtool_sset_info { 267 __u32 cmd; 268 __u32 reserved; 269 __u64 sset_mask; 270 __u32 data[0]; 271 }; 272 enum ethtool_test_flags { 273 ETH_TEST_FL_OFFLINE = (1 << 0), 274 ETH_TEST_FL_FAILED = (1 << 1), 275 ETH_TEST_FL_EXTERNAL_LB = (1 << 2), 276 ETH_TEST_FL_EXTERNAL_LB_DONE = (1 << 3), 277 }; 278 struct ethtool_test { 279 __u32 cmd; 280 __u32 flags; 281 __u32 reserved; 282 __u32 len; 283 __u64 data[0]; 284 }; 285 struct ethtool_stats { 286 __u32 cmd; 287 __u32 n_stats; 288 __u64 data[0]; 289 }; 290 struct ethtool_perm_addr { 291 __u32 cmd; 292 __u32 size; 293 __u8 data[0]; 294 }; 295 enum ethtool_flags { 296 ETH_FLAG_TXVLAN = (1 << 7), 297 ETH_FLAG_RXVLAN = (1 << 8), 298 ETH_FLAG_LRO = (1 << 15), 299 ETH_FLAG_NTUPLE = (1 << 27), 300 ETH_FLAG_RXHASH = (1 << 28), 301 }; 302 struct ethtool_tcpip4_spec { 303 __be32 ip4src; 304 __be32 ip4dst; 305 __be16 psrc; 306 __be16 pdst; 307 __u8 tos; 308 }; 309 struct ethtool_ah_espip4_spec { 310 __be32 ip4src; 311 __be32 ip4dst; 312 __be32 spi; 313 __u8 tos; 314 }; 315 #define ETH_RX_NFC_IP4 1 316 struct ethtool_usrip4_spec { 317 __be32 ip4src; 318 __be32 ip4dst; 319 __be32 l4_4_bytes; 320 __u8 tos; 321 __u8 ip_ver; 322 __u8 proto; 323 }; 324 struct ethtool_tcpip6_spec { 325 __be32 ip6src[4]; 326 __be32 ip6dst[4]; 327 __be16 psrc; 328 __be16 pdst; 329 __u8 tclass; 330 }; 331 struct ethtool_ah_espip6_spec { 332 __be32 ip6src[4]; 333 __be32 ip6dst[4]; 334 __be32 spi; 335 __u8 tclass; 336 }; 337 struct ethtool_usrip6_spec { 338 __be32 ip6src[4]; 339 __be32 ip6dst[4]; 340 __be32 l4_4_bytes; 341 __u8 tclass; 342 __u8 l4_proto; 343 }; 344 union ethtool_flow_union { 345 struct ethtool_tcpip4_spec tcp_ip4_spec; 346 struct ethtool_tcpip4_spec udp_ip4_spec; 347 struct ethtool_tcpip4_spec sctp_ip4_spec; 348 struct ethtool_ah_espip4_spec ah_ip4_spec; 349 struct ethtool_ah_espip4_spec esp_ip4_spec; 350 struct ethtool_usrip4_spec usr_ip4_spec; 351 struct ethtool_tcpip6_spec tcp_ip6_spec; 352 struct ethtool_tcpip6_spec udp_ip6_spec; 353 struct ethtool_tcpip6_spec sctp_ip6_spec; 354 struct ethtool_ah_espip6_spec ah_ip6_spec; 355 struct ethtool_ah_espip6_spec esp_ip6_spec; 356 struct ethtool_usrip6_spec usr_ip6_spec; 357 struct ethhdr ether_spec; 358 __u8 hdata[52]; 359 }; 360 struct ethtool_flow_ext { 361 __u8 padding[2]; 362 unsigned char h_dest[ETH_ALEN]; 363 __be16 vlan_etype; 364 __be16 vlan_tci; 365 __be32 data[2]; 366 }; 367 struct ethtool_rx_flow_spec { 368 __u32 flow_type; 369 union ethtool_flow_union h_u; 370 struct ethtool_flow_ext h_ext; 371 union ethtool_flow_union m_u; 372 struct ethtool_flow_ext m_ext; 373 __u64 ring_cookie; 374 __u32 location; 375 }; 376 #define ETHTOOL_RX_FLOW_SPEC_RING 0x00000000FFFFFFFFLL 377 #define ETHTOOL_RX_FLOW_SPEC_RING_VF 0x000000FF00000000LL 378 #define ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF 32 379 struct ethtool_rxnfc { 380 __u32 cmd; 381 __u32 flow_type; 382 __u64 data; 383 struct ethtool_rx_flow_spec fs; 384 union { 385 __u32 rule_cnt; 386 __u32 rss_context; 387 }; 388 __u32 rule_locs[0]; 389 }; 390 struct ethtool_rxfh_indir { 391 __u32 cmd; 392 __u32 size; 393 __u32 ring_index[0]; 394 }; 395 struct ethtool_rxfh { 396 __u32 cmd; 397 __u32 rss_context; 398 __u32 indir_size; 399 __u32 key_size; 400 __u8 hfunc; 401 __u8 rsvd8[3]; 402 __u32 rsvd32; 403 __u32 rss_config[0]; 404 }; 405 #define ETH_RXFH_CONTEXT_ALLOC 0xffffffff 406 #define ETH_RXFH_INDIR_NO_CHANGE 0xffffffff 407 struct ethtool_rx_ntuple_flow_spec { 408 __u32 flow_type; 409 union { 410 struct ethtool_tcpip4_spec tcp_ip4_spec; 411 struct ethtool_tcpip4_spec udp_ip4_spec; 412 struct ethtool_tcpip4_spec sctp_ip4_spec; 413 struct ethtool_ah_espip4_spec ah_ip4_spec; 414 struct ethtool_ah_espip4_spec esp_ip4_spec; 415 struct ethtool_usrip4_spec usr_ip4_spec; 416 struct ethhdr ether_spec; 417 __u8 hdata[72]; 418 } h_u, m_u; 419 __u16 vlan_tag; 420 __u16 vlan_tag_mask; 421 __u64 data; 422 __u64 data_mask; 423 __s32 action; 424 #define ETHTOOL_RXNTUPLE_ACTION_DROP (- 1) 425 #define ETHTOOL_RXNTUPLE_ACTION_CLEAR (- 2) 426 }; 427 struct ethtool_rx_ntuple { 428 __u32 cmd; 429 struct ethtool_rx_ntuple_flow_spec fs; 430 }; 431 #define ETHTOOL_FLASH_MAX_FILENAME 128 432 enum ethtool_flash_op_type { 433 ETHTOOL_FLASH_ALL_REGIONS = 0, 434 }; 435 struct ethtool_flash { 436 __u32 cmd; 437 __u32 region; 438 char data[ETHTOOL_FLASH_MAX_FILENAME]; 439 }; 440 struct ethtool_dump { 441 __u32 cmd; 442 __u32 version; 443 __u32 flag; 444 __u32 len; 445 __u8 data[0]; 446 }; 447 #define ETH_FW_DUMP_DISABLE 0 448 struct ethtool_get_features_block { 449 __u32 available; 450 __u32 requested; 451 __u32 active; 452 __u32 never_changed; 453 }; 454 struct ethtool_gfeatures { 455 __u32 cmd; 456 __u32 size; 457 struct ethtool_get_features_block features[0]; 458 }; 459 struct ethtool_set_features_block { 460 __u32 valid; 461 __u32 requested; 462 }; 463 struct ethtool_sfeatures { 464 __u32 cmd; 465 __u32 size; 466 struct ethtool_set_features_block features[0]; 467 }; 468 struct ethtool_ts_info { 469 __u32 cmd; 470 __u32 so_timestamping; 471 __s32 phc_index; 472 __u32 tx_types; 473 __u32 tx_reserved[3]; 474 __u32 rx_filters; 475 __u32 rx_reserved[3]; 476 }; 477 enum ethtool_sfeatures_retval_bits { 478 ETHTOOL_F_UNSUPPORTED__BIT, 479 ETHTOOL_F_WISH__BIT, 480 ETHTOOL_F_COMPAT__BIT, 481 }; 482 #define ETHTOOL_F_UNSUPPORTED (1 << ETHTOOL_F_UNSUPPORTED__BIT) 483 #define ETHTOOL_F_WISH (1 << ETHTOOL_F_WISH__BIT) 484 #define ETHTOOL_F_COMPAT (1 << ETHTOOL_F_COMPAT__BIT) 485 #define MAX_NUM_QUEUE 4096 486 struct ethtool_per_queue_op { 487 __u32 cmd; 488 __u32 sub_command; 489 __u32 queue_mask[__KERNEL_DIV_ROUND_UP(MAX_NUM_QUEUE, 32)]; 490 char data[]; 491 }; 492 struct ethtool_fecparam { 493 __u32 cmd; 494 __u32 active_fec; 495 __u32 fec; 496 __u32 reserved; 497 }; 498 enum ethtool_fec_config_bits { 499 ETHTOOL_FEC_NONE_BIT, 500 ETHTOOL_FEC_AUTO_BIT, 501 ETHTOOL_FEC_OFF_BIT, 502 ETHTOOL_FEC_RS_BIT, 503 ETHTOOL_FEC_BASER_BIT, 504 ETHTOOL_FEC_LLRS_BIT, 505 }; 506 #define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT) 507 #define ETHTOOL_FEC_AUTO (1 << ETHTOOL_FEC_AUTO_BIT) 508 #define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT) 509 #define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT) 510 #define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT) 511 #define ETHTOOL_FEC_LLRS (1 << ETHTOOL_FEC_LLRS_BIT) 512 #define ETHTOOL_GSET 0x00000001 513 #define ETHTOOL_SSET 0x00000002 514 #define ETHTOOL_GDRVINFO 0x00000003 515 #define ETHTOOL_GREGS 0x00000004 516 #define ETHTOOL_GWOL 0x00000005 517 #define ETHTOOL_SWOL 0x00000006 518 #define ETHTOOL_GMSGLVL 0x00000007 519 #define ETHTOOL_SMSGLVL 0x00000008 520 #define ETHTOOL_NWAY_RST 0x00000009 521 #define ETHTOOL_GLINK 0x0000000a 522 #define ETHTOOL_GEEPROM 0x0000000b 523 #define ETHTOOL_SEEPROM 0x0000000c 524 #define ETHTOOL_GCOALESCE 0x0000000e 525 #define ETHTOOL_SCOALESCE 0x0000000f 526 #define ETHTOOL_GRINGPARAM 0x00000010 527 #define ETHTOOL_SRINGPARAM 0x00000011 528 #define ETHTOOL_GPAUSEPARAM 0x00000012 529 #define ETHTOOL_SPAUSEPARAM 0x00000013 530 #define ETHTOOL_GRXCSUM 0x00000014 531 #define ETHTOOL_SRXCSUM 0x00000015 532 #define ETHTOOL_GTXCSUM 0x00000016 533 #define ETHTOOL_STXCSUM 0x00000017 534 #define ETHTOOL_GSG 0x00000018 535 #define ETHTOOL_SSG 0x00000019 536 #define ETHTOOL_TEST 0x0000001a 537 #define ETHTOOL_GSTRINGS 0x0000001b 538 #define ETHTOOL_PHYS_ID 0x0000001c 539 #define ETHTOOL_GSTATS 0x0000001d 540 #define ETHTOOL_GTSO 0x0000001e 541 #define ETHTOOL_STSO 0x0000001f 542 #define ETHTOOL_GPERMADDR 0x00000020 543 #define ETHTOOL_GUFO 0x00000021 544 #define ETHTOOL_SUFO 0x00000022 545 #define ETHTOOL_GGSO 0x00000023 546 #define ETHTOOL_SGSO 0x00000024 547 #define ETHTOOL_GFLAGS 0x00000025 548 #define ETHTOOL_SFLAGS 0x00000026 549 #define ETHTOOL_GPFLAGS 0x00000027 550 #define ETHTOOL_SPFLAGS 0x00000028 551 #define ETHTOOL_GRXFH 0x00000029 552 #define ETHTOOL_SRXFH 0x0000002a 553 #define ETHTOOL_GGRO 0x0000002b 554 #define ETHTOOL_SGRO 0x0000002c 555 #define ETHTOOL_GRXRINGS 0x0000002d 556 #define ETHTOOL_GRXCLSRLCNT 0x0000002e 557 #define ETHTOOL_GRXCLSRULE 0x0000002f 558 #define ETHTOOL_GRXCLSRLALL 0x00000030 559 #define ETHTOOL_SRXCLSRLDEL 0x00000031 560 #define ETHTOOL_SRXCLSRLINS 0x00000032 561 #define ETHTOOL_FLASHDEV 0x00000033 562 #define ETHTOOL_RESET 0x00000034 563 #define ETHTOOL_SRXNTUPLE 0x00000035 564 #define ETHTOOL_GRXNTUPLE 0x00000036 565 #define ETHTOOL_GSSET_INFO 0x00000037 566 #define ETHTOOL_GRXFHINDIR 0x00000038 567 #define ETHTOOL_SRXFHINDIR 0x00000039 568 #define ETHTOOL_GFEATURES 0x0000003a 569 #define ETHTOOL_SFEATURES 0x0000003b 570 #define ETHTOOL_GCHANNELS 0x0000003c 571 #define ETHTOOL_SCHANNELS 0x0000003d 572 #define ETHTOOL_SET_DUMP 0x0000003e 573 #define ETHTOOL_GET_DUMP_FLAG 0x0000003f 574 #define ETHTOOL_GET_DUMP_DATA 0x00000040 575 #define ETHTOOL_GET_TS_INFO 0x00000041 576 #define ETHTOOL_GMODULEINFO 0x00000042 577 #define ETHTOOL_GMODULEEEPROM 0x00000043 578 #define ETHTOOL_GEEE 0x00000044 579 #define ETHTOOL_SEEE 0x00000045 580 #define ETHTOOL_GRSSH 0x00000046 581 #define ETHTOOL_SRSSH 0x00000047 582 #define ETHTOOL_GTUNABLE 0x00000048 583 #define ETHTOOL_STUNABLE 0x00000049 584 #define ETHTOOL_GPHYSTATS 0x0000004a 585 #define ETHTOOL_PERQUEUE 0x0000004b 586 #define ETHTOOL_GLINKSETTINGS 0x0000004c 587 #define ETHTOOL_SLINKSETTINGS 0x0000004d 588 #define ETHTOOL_PHY_GTUNABLE 0x0000004e 589 #define ETHTOOL_PHY_STUNABLE 0x0000004f 590 #define ETHTOOL_GFECPARAM 0x00000050 591 #define ETHTOOL_SFECPARAM 0x00000051 592 #define SPARC_ETH_GSET ETHTOOL_GSET 593 #define SPARC_ETH_SSET ETHTOOL_SSET 594 enum ethtool_link_mode_bit_indices { 595 ETHTOOL_LINK_MODE_10baseT_Half_BIT = 0, 596 ETHTOOL_LINK_MODE_10baseT_Full_BIT = 1, 597 ETHTOOL_LINK_MODE_100baseT_Half_BIT = 2, 598 ETHTOOL_LINK_MODE_100baseT_Full_BIT = 3, 599 ETHTOOL_LINK_MODE_1000baseT_Half_BIT = 4, 600 ETHTOOL_LINK_MODE_1000baseT_Full_BIT = 5, 601 ETHTOOL_LINK_MODE_Autoneg_BIT = 6, 602 ETHTOOL_LINK_MODE_TP_BIT = 7, 603 ETHTOOL_LINK_MODE_AUI_BIT = 8, 604 ETHTOOL_LINK_MODE_MII_BIT = 9, 605 ETHTOOL_LINK_MODE_FIBRE_BIT = 10, 606 ETHTOOL_LINK_MODE_BNC_BIT = 11, 607 ETHTOOL_LINK_MODE_10000baseT_Full_BIT = 12, 608 ETHTOOL_LINK_MODE_Pause_BIT = 13, 609 ETHTOOL_LINK_MODE_Asym_Pause_BIT = 14, 610 ETHTOOL_LINK_MODE_2500baseX_Full_BIT = 15, 611 ETHTOOL_LINK_MODE_Backplane_BIT = 16, 612 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT = 17, 613 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT = 18, 614 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT = 19, 615 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT = 20, 616 ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT = 21, 617 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT = 22, 618 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT = 23, 619 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT = 24, 620 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT = 25, 621 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT = 26, 622 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT = 27, 623 ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT = 28, 624 ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT = 29, 625 ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT = 30, 626 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT = 31, 627 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT = 32, 628 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT = 33, 629 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT = 34, 630 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT = 35, 631 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT = 36, 632 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT = 37, 633 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT = 38, 634 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT = 39, 635 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT = 40, 636 ETHTOOL_LINK_MODE_1000baseX_Full_BIT = 41, 637 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT = 42, 638 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT = 43, 639 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT = 44, 640 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT = 45, 641 ETHTOOL_LINK_MODE_10000baseER_Full_BIT = 46, 642 ETHTOOL_LINK_MODE_2500baseT_Full_BIT = 47, 643 ETHTOOL_LINK_MODE_5000baseT_Full_BIT = 48, 644 ETHTOOL_LINK_MODE_FEC_NONE_BIT = 49, 645 ETHTOOL_LINK_MODE_FEC_RS_BIT = 50, 646 ETHTOOL_LINK_MODE_FEC_BASER_BIT = 51, 647 ETHTOOL_LINK_MODE_50000baseKR_Full_BIT = 52, 648 ETHTOOL_LINK_MODE_50000baseSR_Full_BIT = 53, 649 ETHTOOL_LINK_MODE_50000baseCR_Full_BIT = 54, 650 ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT = 55, 651 ETHTOOL_LINK_MODE_50000baseDR_Full_BIT = 56, 652 ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT = 57, 653 ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT = 58, 654 ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT = 59, 655 ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT = 60, 656 ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT = 61, 657 ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT = 62, 658 ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT = 63, 659 ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT = 64, 660 ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT = 65, 661 ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT = 66, 662 ETHTOOL_LINK_MODE_100baseT1_Full_BIT = 67, 663 ETHTOOL_LINK_MODE_1000baseT1_Full_BIT = 68, 664 ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT = 69, 665 ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT = 70, 666 ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71, 667 ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT = 72, 668 ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT = 73, 669 ETHTOOL_LINK_MODE_FEC_LLRS_BIT = 74, 670 ETHTOOL_LINK_MODE_100000baseKR_Full_BIT = 75, 671 ETHTOOL_LINK_MODE_100000baseSR_Full_BIT = 76, 672 ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT = 77, 673 ETHTOOL_LINK_MODE_100000baseCR_Full_BIT = 78, 674 ETHTOOL_LINK_MODE_100000baseDR_Full_BIT = 79, 675 ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT = 80, 676 ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT = 81, 677 ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT = 82, 678 ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT = 83, 679 ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT = 84, 680 ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT = 85, 681 ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT = 86, 682 ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT = 87, 683 ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT = 88, 684 ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT = 89, 685 ETHTOOL_LINK_MODE_100baseFX_Half_BIT = 90, 686 ETHTOOL_LINK_MODE_100baseFX_Full_BIT = 91, 687 __ETHTOOL_LINK_MODE_MASK_NBITS 688 }; 689 #define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) (1UL << (ETHTOOL_LINK_MODE_ ##base_name ##_BIT)) 690 #define SUPPORTED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 691 #define SUPPORTED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 692 #define SUPPORTED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 693 #define SUPPORTED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 694 #define SUPPORTED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 695 #define SUPPORTED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 696 #define SUPPORTED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 697 #define SUPPORTED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 698 #define SUPPORTED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 699 #define SUPPORTED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 700 #define SUPPORTED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 701 #define SUPPORTED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 702 #define SUPPORTED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 703 #define SUPPORTED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 704 #define SUPPORTED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 705 #define SUPPORTED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 706 #define SUPPORTED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 707 #define SUPPORTED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 708 #define SUPPORTED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 709 #define SUPPORTED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 710 #define SUPPORTED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 711 #define SUPPORTED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 712 #define SUPPORTED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 713 #define SUPPORTED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 714 #define SUPPORTED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 715 #define SUPPORTED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 716 #define SUPPORTED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 717 #define SUPPORTED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 718 #define SUPPORTED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 719 #define SUPPORTED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 720 #define SUPPORTED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 721 #define ADVERTISED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 722 #define ADVERTISED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 723 #define ADVERTISED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 724 #define ADVERTISED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 725 #define ADVERTISED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 726 #define ADVERTISED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 727 #define ADVERTISED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 728 #define ADVERTISED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 729 #define ADVERTISED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 730 #define ADVERTISED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 731 #define ADVERTISED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 732 #define ADVERTISED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 733 #define ADVERTISED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 734 #define ADVERTISED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 735 #define ADVERTISED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 736 #define ADVERTISED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 737 #define ADVERTISED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 738 #define ADVERTISED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 739 #define ADVERTISED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 740 #define ADVERTISED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 741 #define ADVERTISED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 742 #define ADVERTISED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 743 #define ADVERTISED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 744 #define ADVERTISED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 745 #define ADVERTISED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 746 #define ADVERTISED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 747 #define ADVERTISED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 748 #define ADVERTISED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 749 #define ADVERTISED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 750 #define ADVERTISED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 751 #define ADVERTISED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 752 #define SPEED_10 10 753 #define SPEED_100 100 754 #define SPEED_1000 1000 755 #define SPEED_2500 2500 756 #define SPEED_5000 5000 757 #define SPEED_10000 10000 758 #define SPEED_14000 14000 759 #define SPEED_20000 20000 760 #define SPEED_25000 25000 761 #define SPEED_40000 40000 762 #define SPEED_50000 50000 763 #define SPEED_56000 56000 764 #define SPEED_100000 100000 765 #define SPEED_200000 200000 766 #define SPEED_400000 400000 767 #define SPEED_UNKNOWN - 1 768 #define DUPLEX_HALF 0x00 769 #define DUPLEX_FULL 0x01 770 #define DUPLEX_UNKNOWN 0xff 771 #define MASTER_SLAVE_CFG_UNSUPPORTED 0 772 #define MASTER_SLAVE_CFG_UNKNOWN 1 773 #define MASTER_SLAVE_CFG_MASTER_PREFERRED 2 774 #define MASTER_SLAVE_CFG_SLAVE_PREFERRED 3 775 #define MASTER_SLAVE_CFG_MASTER_FORCE 4 776 #define MASTER_SLAVE_CFG_SLAVE_FORCE 5 777 #define MASTER_SLAVE_STATE_UNSUPPORTED 0 778 #define MASTER_SLAVE_STATE_UNKNOWN 1 779 #define MASTER_SLAVE_STATE_MASTER 2 780 #define MASTER_SLAVE_STATE_SLAVE 3 781 #define MASTER_SLAVE_STATE_ERR 4 782 #define PORT_TP 0x00 783 #define PORT_AUI 0x01 784 #define PORT_MII 0x02 785 #define PORT_FIBRE 0x03 786 #define PORT_BNC 0x04 787 #define PORT_DA 0x05 788 #define PORT_NONE 0xef 789 #define PORT_OTHER 0xff 790 #define XCVR_INTERNAL 0x00 791 #define XCVR_EXTERNAL 0x01 792 #define XCVR_DUMMY1 0x02 793 #define XCVR_DUMMY2 0x03 794 #define XCVR_DUMMY3 0x04 795 #define AUTONEG_DISABLE 0x00 796 #define AUTONEG_ENABLE 0x01 797 #define ETH_TP_MDI_INVALID 0x00 798 #define ETH_TP_MDI 0x01 799 #define ETH_TP_MDI_X 0x02 800 #define ETH_TP_MDI_AUTO 0x03 801 #define WAKE_PHY (1 << 0) 802 #define WAKE_UCAST (1 << 1) 803 #define WAKE_MCAST (1 << 2) 804 #define WAKE_BCAST (1 << 3) 805 #define WAKE_ARP (1 << 4) 806 #define WAKE_MAGIC (1 << 5) 807 #define WAKE_MAGICSECURE (1 << 6) 808 #define WAKE_FILTER (1 << 7) 809 #define WOL_MODE_COUNT 8 810 #define TCP_V4_FLOW 0x01 811 #define UDP_V4_FLOW 0x02 812 #define SCTP_V4_FLOW 0x03 813 #define AH_ESP_V4_FLOW 0x04 814 #define TCP_V6_FLOW 0x05 815 #define UDP_V6_FLOW 0x06 816 #define SCTP_V6_FLOW 0x07 817 #define AH_ESP_V6_FLOW 0x08 818 #define AH_V4_FLOW 0x09 819 #define ESP_V4_FLOW 0x0a 820 #define AH_V6_FLOW 0x0b 821 #define ESP_V6_FLOW 0x0c 822 #define IPV4_USER_FLOW 0x0d 823 #define IP_USER_FLOW IPV4_USER_FLOW 824 #define IPV6_USER_FLOW 0x0e 825 #define IPV4_FLOW 0x10 826 #define IPV6_FLOW 0x11 827 #define ETHER_FLOW 0x12 828 #define FLOW_EXT 0x80000000 829 #define FLOW_MAC_EXT 0x40000000 830 #define FLOW_RSS 0x20000000 831 #define RXH_L2DA (1 << 1) 832 #define RXH_VLAN (1 << 2) 833 #define RXH_L3_PROTO (1 << 3) 834 #define RXH_IP_SRC (1 << 4) 835 #define RXH_IP_DST (1 << 5) 836 #define RXH_L4_B_0_1 (1 << 6) 837 #define RXH_L4_B_2_3 (1 << 7) 838 #define RXH_DISCARD (1 << 31) 839 #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL 840 #define RX_CLS_FLOW_WAKE 0xfffffffffffffffeULL 841 #define RX_CLS_LOC_SPECIAL 0x80000000 842 #define RX_CLS_LOC_ANY 0xffffffff 843 #define RX_CLS_LOC_FIRST 0xfffffffe 844 #define RX_CLS_LOC_LAST 0xfffffffd 845 #define ETH_MODULE_SFF_8079 0x1 846 #define ETH_MODULE_SFF_8079_LEN 256 847 #define ETH_MODULE_SFF_8472 0x2 848 #define ETH_MODULE_SFF_8472_LEN 512 849 #define ETH_MODULE_SFF_8636 0x3 850 #define ETH_MODULE_SFF_8636_LEN 256 851 #define ETH_MODULE_SFF_8436 0x4 852 #define ETH_MODULE_SFF_8436_LEN 256 853 #define ETH_MODULE_SFF_8636_MAX_LEN 640 854 #define ETH_MODULE_SFF_8436_MAX_LEN 640 855 enum ethtool_reset_flags { 856 ETH_RESET_MGMT = 1 << 0, 857 ETH_RESET_IRQ = 1 << 1, 858 ETH_RESET_DMA = 1 << 2, 859 ETH_RESET_FILTER = 1 << 3, 860 ETH_RESET_OFFLOAD = 1 << 4, 861 ETH_RESET_MAC = 1 << 5, 862 ETH_RESET_PHY = 1 << 6, 863 ETH_RESET_RAM = 1 << 7, 864 ETH_RESET_AP = 1 << 8, 865 ETH_RESET_DEDICATED = 0x0000ffff, 866 ETH_RESET_ALL = 0xffffffff, 867 }; 868 #define ETH_RESET_SHARED_SHIFT 16 869 struct ethtool_link_settings { 870 __u32 cmd; 871 __u32 speed; 872 __u8 duplex; 873 __u8 port; 874 __u8 phy_address; 875 __u8 autoneg; 876 __u8 mdio_support; 877 __u8 eth_tp_mdix; 878 __u8 eth_tp_mdix_ctrl; 879 __s8 link_mode_masks_nwords; 880 __u8 transceiver; 881 __u8 master_slave_cfg; 882 __u8 master_slave_state; 883 __u8 reserved1[1]; 884 __u32 reserved[7]; 885 __u32 link_mode_masks[0]; 886 }; 887 #endif 888