1/* 2 * Copyright (C) 2008 The Android Open Source Project 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28/* 29 * Copyright (c) 2013 ARM Ltd 30 * All rights reserved. 31 * 32 * Redistribution and use in source and binary forms, with or without 33 * modification, are permitted provided that the following conditions 34 * are met: 35 * 1. Redistributions of source code must retain the above copyright 36 * notice, this list of conditions and the following disclaimer. 37 * 2. Redistributions in binary form must reproduce the above copyright 38 * notice, this list of conditions and the following disclaimer in the 39 * documentation and/or other materials provided with the distribution. 40 * 3. The name of the company may not be used to endorse or promote 41 * products derived from this software without specific prior written 42 * permission. 43 * 44 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED 45 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 46 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 47 * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 49 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 50 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 51 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 52 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 53 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 */ 55 56.L_memcpy_base: 57 // Assumes that n >= 0, and dst, src are valid pointers. 58 cmp r2, #16 59 blo .L_copy_less_than_16_unknown_align 60 61.L_copy_unknown_alignment: 62 // Unknown alignment of src and dst. 63 // Assumes that the first few bytes have already been prefetched. 64 65 // Align destination to 128 bits. The mainloop store instructions 66 // require this alignment or they will throw an exception. 67 rsb r3, r0, #0 68 ands r3, r3, #0xF 69 beq 2f 70 71 // Copy up to 15 bytes (count in r3). 72 sub r2, r2, r3 73 movs ip, r3, lsl #31 74 75 itt mi 76 ldrbmi lr, [r1], #1 77 strbmi lr, [r0], #1 78 itttt cs 79 ldrbcs ip, [r1], #1 80 ldrbcs lr, [r1], #1 81 strbcs ip, [r0], #1 82 strbcs lr, [r0], #1 83 84 movs ip, r3, lsl #29 85 bge 1f 86 // Copies 4 bytes, dst 32 bits aligned before, at least 64 bits after. 87 vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]! 88 vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]! 891: bcc 2f 90 // Copies 8 bytes, dst 64 bits aligned before, at least 128 bits after. 91 vld1.8 {d0}, [r1]! 92 vst1.8 {d0}, [r0, :64]! 93 942: // Make sure we have at least 64 bytes to copy. 95 subs r2, r2, #64 96 blo 2f 97 981: // The main loop copies 64 bytes at a time. 99 vld1.8 {d0 - d3}, [r1]! 100 vld1.8 {d4 - d7}, [r1]! 101 subs r2, r2, #64 102 vstmia r0!, {d0 - d7} 103 pld [r1, #(64*10)] 104 bhs 1b 105 1062: // Fix-up the remaining count and make sure we have >= 32 bytes left. 107 adds r2, r2, #32 108 blo 3f 109 110 // 32 bytes. These cache lines were already preloaded. 111 vld1.8 {d0 - d3}, [r1]! 112 sub r2, r2, #32 113 vst1.8 {d0 - d3}, [r0, :128]! 1143: // Less than 32 left. 115 add r2, r2, #32 116 tst r2, #0x10 117 beq .L_copy_less_than_16_unknown_align 118 // Copies 16 bytes, destination 128 bits aligned. 119 vld1.8 {d0, d1}, [r1]! 120 vst1.8 {d0, d1}, [r0, :128]! 121 122.L_copy_less_than_16_unknown_align: 123 // Copy up to 15 bytes (count in r2). 124 movs ip, r2, lsl #29 125 bcc 1f 126 vld1.8 {d0}, [r1]! 127 vst1.8 {d0}, [r0]! 1281: bge 2f 129 vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]! 130 vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]! 131 1322: // Copy 0 to 4 bytes. 133 lsls r2, r2, #31 134 itt ne 135 ldrbne lr, [r1], #1 136 strbne lr, [r0], #1 137 itttt cs 138 ldrbcs ip, [r1], #1 139 ldrbcs lr, [r1] 140 strbcs ip, [r0], #1 141 strbcs lr, [r0] 142 143 pop {r0, pc} 144