1 /******************************************************************************
2 *
3 * Copyright 1999-2012 Broadcom Corporation
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18
19 /******************************************************************************
20 *
21 * This file contains function of the HCIC unit to format and send HCI
22 * commands.
23 *
24 ******************************************************************************/
25
26 #include "bt_common.h"
27 #include "bt_target.h"
28 #include "btu.h"
29 #include "hcidefs.h"
30 #include "hcimsgs.h"
31
32 #include <stddef.h>
33 #include <string.h>
34
35 #include "stack/include/acl_hci_link_interface.h"
36
37 #include "bt_target.h"
38 #include "bt_types.h"
39 #include "device/include/esco_parameters.h"
40 #include "hcidefs.h"
41
42 #include <base/callback_forward.h>
43
44 void bte_main_hci_send(BT_HDR* p_msg, uint16_t event);
45
46 /* Message by message.... */
47
48 #define HCIC_PARAM_SIZE_INQUIRY 5
49
50 #define HCIC_INQ_INQ_LAP_OFF 0
51 #define HCIC_INQ_DUR_OFF 3
52 #define HCIC_INQ_RSP_CNT_OFF 4
53 /* Inquiry */
54
55 /* Inquiry Cancel */
56 #define HCIC_PARAM_SIZE_INQ_CANCEL 0
57
58 /* Periodic Inquiry Mode */
59 #define HCIC_PARAM_SIZE_PER_INQ_MODE 9
60
61 #define HCI_PER_INQ_MAX_INTRVL_OFF 0
62 #define HCI_PER_INQ_MIN_INTRVL_OFF 2
63 #define HCI_PER_INQ_INQ_LAP_OFF 4
64 #define HCI_PER_INQ_DURATION_OFF 7
65 #define HCI_PER_INQ_RSP_CNT_OFF 8
66 /* Periodic Inquiry Mode */
67
68 /* Exit Periodic Inquiry Mode */
69 #define HCIC_PARAM_SIZE_EXIT_PER_INQ 0
70
71 /* Create Connection */
72 #define HCIC_PARAM_SIZE_CREATE_CONN 13
73
74 #define HCIC_CR_CONN_BD_ADDR_OFF 0
75 #define HCIC_CR_CONN_PKT_TYPES_OFF 6
76 #define HCIC_CR_CONN_REP_MODE_OFF 8
77 #define HCIC_CR_CONN_PAGE_SCAN_MODE_OFF 9
78 #define HCIC_CR_CONN_CLK_OFF_OFF 10
79 #define HCIC_CR_CONN_ALLOW_SWITCH_OFF 12
80 /* Create Connection */
81
82 /* Disconnect */
83 #define HCIC_PARAM_SIZE_DISCONNECT 3
84
85 #define HCI_DISC_HANDLE_OFF 0
86 #define HCI_DISC_REASON_OFF 2
87 /* Disconnect */
88
89 /* Add SCO Connection */
90 #define HCIC_PARAM_SIZE_ADD_SCO_CONN 4
91
92 #define HCI_ADD_SCO_HANDLE_OFF 0
93 #define HCI_ADD_SCO_PACKET_TYPES_OFF 2
94 /* Add SCO Connection */
95
96 /* Create Connection Cancel */
97 #define HCIC_PARAM_SIZE_CREATE_CONN_CANCEL 6
98
99 #define HCIC_CR_CONN_CANCEL_BD_ADDR_OFF 0
100 /* Create Connection Cancel */
101
102 /* Accept Connection Request */
103 #define HCIC_PARAM_SIZE_ACCEPT_CONN 7
104
105 #define HCI_ACC_CONN_BD_ADDR_OFF 0
106 #define HCI_ACC_CONN_ROLE_OFF 6
107 /* Accept Connection Request */
108
109 /* Reject Connection Request */
110 #define HCIC_PARAM_SIZE_REJECT_CONN 7
111
112 #define HCI_REJ_CONN_BD_ADDR_OFF 0
113 #define HCI_REJ_CONN_REASON_OFF 6
114 /* Reject Connection Request */
115
116 /* Link Key Request Reply */
117 #define HCIC_PARAM_SIZE_LINK_KEY_REQ_REPLY 22
118
119 #define HCI_LINK_KEY_REPLY_BD_ADDR_OFF 0
120 #define HCI_LINK_KEY_REPLY_LINK_KEY_OFF 6
121 /* Link Key Request Reply */
122
123 /* Link Key Request Neg Reply */
124 #define HCIC_PARAM_SIZE_LINK_KEY_NEG_REPLY 6
125
126 #define HCI_LINK_KEY_NEG_REP_BD_ADR_OFF 0
127 /* Link Key Request Neg Reply */
128
129 /* PIN Code Request Reply */
130 #define HCIC_PARAM_SIZE_PIN_CODE_REQ_REPLY 23
131
132 #define HCI_PIN_CODE_REPLY_BD_ADDR_OFF 0
133 #define HCI_PIN_CODE_REPLY_PIN_LEN_OFF 6
134 #define HCI_PIN_CODE_REPLY_PIN_CODE_OFF 7
135 /* PIN Code Request Reply */
136
137 /* Link Key Request Neg Reply */
138 #define HCIC_PARAM_SIZE_PIN_CODE_NEG_REPLY 6
139
140 #define HCI_PIN_CODE_NEG_REP_BD_ADR_OFF 0
141 /* Link Key Request Neg Reply */
142
143 /* Change Connection Type */
144 #define HCIC_PARAM_SIZE_CHANGE_CONN_TYPE 4
145
146 #define HCI_CHNG_PKT_TYPE_HANDLE_OFF 0
147 #define HCI_CHNG_PKT_TYPE_PKT_TYPE_OFF 2
148 /* Change Connection Type */
149
150 #define HCIC_PARAM_SIZE_CMD_HANDLE 2
151
152 #define HCI_CMD_HANDLE_HANDLE_OFF 0
153
154 /* Set Connection Encryption */
155 #define HCIC_PARAM_SIZE_SET_CONN_ENCRYPT 3
156
157 #define HCI_SET_ENCRYPT_HANDLE_OFF 0
158 #define HCI_SET_ENCRYPT_ENABLE_OFF 2
159 /* Set Connection Encryption */
160
161 /* Remote Name Request */
162 #define HCIC_PARAM_SIZE_RMT_NAME_REQ 10
163
164 #define HCI_RMT_NAME_BD_ADDR_OFF 0
165 #define HCI_RMT_NAME_REP_MODE_OFF 6
166 #define HCI_RMT_NAME_PAGE_SCAN_MODE_OFF 7
167 #define HCI_RMT_NAME_CLK_OFF_OFF 8
168 /* Remote Name Request */
169
170 /* Remote Name Request Cancel */
171 #define HCIC_PARAM_SIZE_RMT_NAME_REQ_CANCEL 6
172
173 #define HCI_RMT_NAME_CANCEL_BD_ADDR_OFF 0
174 /* Remote Name Request Cancel */
175
176 /* Remote Extended Features */
177 #define HCIC_PARAM_SIZE_RMT_EXT_FEATURES 3
178
179 #define HCI_RMT_EXT_FEATURES_HANDLE_OFF 0
180 #define HCI_RMT_EXT_FEATURES_PAGE_NUM_OFF 2
181 /* Remote Extended Features */
182
183 #define HCIC_PARAM_SIZE_SETUP_ESCO 17
184
185 #define HCI_SETUP_ESCO_HANDLE_OFF 0
186 #define HCI_SETUP_ESCO_TX_BW_OFF 2
187 #define HCI_SETUP_ESCO_RX_BW_OFF 6
188 #define HCI_SETUP_ESCO_MAX_LAT_OFF 10
189 #define HCI_SETUP_ESCO_VOICE_OFF 12
190 #define HCI_SETUP_ESCO_RETRAN_EFF_OFF 14
191 #define HCI_SETUP_ESCO_PKT_TYPES_OFF 15
192
193 #define HCIC_PARAM_SIZE_ACCEPT_ESCO 21
194
195 #define HCI_ACCEPT_ESCO_BDADDR_OFF 0
196 #define HCI_ACCEPT_ESCO_TX_BW_OFF 6
197 #define HCI_ACCEPT_ESCO_RX_BW_OFF 10
198 #define HCI_ACCEPT_ESCO_MAX_LAT_OFF 14
199 #define HCI_ACCEPT_ESCO_VOICE_OFF 16
200 #define HCI_ACCEPT_ESCO_RETRAN_EFF_OFF 18
201 #define HCI_ACCEPT_ESCO_PKT_TYPES_OFF 19
202
203 #define HCIC_PARAM_SIZE_REJECT_ESCO 7
204
205 #define HCI_REJECT_ESCO_BDADDR_OFF 0
206 #define HCI_REJECT_ESCO_REASON_OFF 6
207
208 /* Hold Mode */
209 #define HCIC_PARAM_SIZE_HOLD_MODE 6
210
211 #define HCI_HOLD_MODE_HANDLE_OFF 0
212 #define HCI_HOLD_MODE_MAX_PER_OFF 2
213 #define HCI_HOLD_MODE_MIN_PER_OFF 4
214 /* Hold Mode */
215
216 /* Sniff Mode */
217 #define HCIC_PARAM_SIZE_SNIFF_MODE 10
218
219 #define HCI_SNIFF_MODE_HANDLE_OFF 0
220 #define HCI_SNIFF_MODE_MAX_PER_OFF 2
221 #define HCI_SNIFF_MODE_MIN_PER_OFF 4
222 #define HCI_SNIFF_MODE_ATTEMPT_OFF 6
223 #define HCI_SNIFF_MODE_TIMEOUT_OFF 8
224 /* Sniff Mode */
225
226 /* Park Mode */
227 #define HCIC_PARAM_SIZE_PARK_MODE 6
228
229 #define HCI_PARK_MODE_HANDLE_OFF 0
230 #define HCI_PARK_MODE_MAX_PER_OFF 2
231 #define HCI_PARK_MODE_MIN_PER_OFF 4
232 /* Park Mode */
233
234 /* QoS Setup */
235 #define HCIC_PARAM_SIZE_QOS_SETUP 20
236
237 #define HCI_QOS_HANDLE_OFF 0
238 #define HCI_QOS_FLAGS_OFF 2
239 #define HCI_QOS_SERVICE_TYPE_OFF 3
240 #define HCI_QOS_TOKEN_RATE_OFF 4
241 #define HCI_QOS_PEAK_BANDWIDTH_OFF 8
242 #define HCI_QOS_LATENCY_OFF 12
243 #define HCI_QOS_DELAY_VAR_OFF 16
244 /* QoS Setup */
245
246 #define HCIC_PARAM_SIZE_SWITCH_ROLE 7
247
248 #define HCI_SWITCH_BD_ADDR_OFF 0
249 #define HCI_SWITCH_ROLE_OFF 6
250 /* Switch Role Request */
251
252 /* Write Policy Settings */
253 #define HCIC_PARAM_SIZE_WRITE_POLICY_SET 4
254
255 #define HCI_WRITE_POLICY_HANDLE_OFF 0
256 #define HCI_WRITE_POLICY_SETTINGS_OFF 2
257 /* Write Policy Settings */
258
259 /* Write Default Policy Settings */
260 #define HCIC_PARAM_SIZE_WRITE_DEF_POLICY_SET 2
261
262 #define HCI_WRITE_DEF_POLICY_SETTINGS_OFF 0
263 /* Write Default Policy Settings */
264
265 #define HCIC_PARAM_SIZE_SNIFF_SUB_RATE 8
266
267 #define HCI_SNIFF_SUB_RATE_HANDLE_OFF 0
268 #define HCI_SNIFF_SUB_RATE_MAX_LAT_OFF 2
269 #define HCI_SNIFF_SUB_RATE_MIN_REM_LAT_OFF 4
270 #define HCI_SNIFF_SUB_RATE_MIN_LOC_LAT_OFF 6
271 /* Sniff Subrating */
272
273 /* Extended Inquiry Response */
274 #define HCIC_PARAM_SIZE_EXT_INQ_RESP 241
275
276 #define HCIC_EXT_INQ_RESP_FEC_OFF 0
277 #define HCIC_EXT_INQ_RESP_RESPONSE 1
278 /* IO Capabilities Response */
279 #define HCIC_PARAM_SIZE_IO_CAP_RESP 9
280
281 #define HCI_IO_CAP_BD_ADDR_OFF 0
282 #define HCI_IO_CAPABILITY_OFF 6
283 #define HCI_IO_CAP_OOB_DATA_OFF 7
284 #define HCI_IO_CAP_AUTH_REQ_OFF 8
285
286 /* IO Capabilities Req Neg Reply */
287 #define HCIC_PARAM_SIZE_IO_CAP_NEG_REPLY 7
288
289 #define HCI_IO_CAP_NR_BD_ADDR_OFF 0
290 #define HCI_IO_CAP_NR_ERR_CODE 6
291
292 /* Read Local OOB Data */
293 #define HCIC_PARAM_SIZE_R_LOCAL_OOB 0
294
295 #define HCIC_PARAM_SIZE_UCONF_REPLY 6
296
297 #define HCI_USER_CONF_BD_ADDR_OFF 0
298
299 #define HCIC_PARAM_SIZE_U_PKEY_REPLY 10
300
301 #define HCI_USER_PASSKEY_BD_ADDR_OFF 0
302 #define HCI_USER_PASSKEY_VALUE_OFF 6
303
304 #define HCIC_PARAM_SIZE_U_PKEY_NEG_REPLY 6
305
306 #define HCI_USER_PASSKEY_NEG_BD_ADDR_OFF 0
307
308 /* Remote OOB Data Request Reply */
309 #define HCIC_PARAM_SIZE_REM_OOB_REPLY 38
310
311 #define HCI_REM_OOB_DATA_BD_ADDR_OFF 0
312 #define HCI_REM_OOB_DATA_C_OFF 6
313 #define HCI_REM_OOB_DATA_R_OFF 22
314
315 /* Remote OOB Data Request Negative Reply */
316 #define HCIC_PARAM_SIZE_REM_OOB_NEG_REPLY 6
317
318 #define HCI_REM_OOB_DATA_NEG_BD_ADDR_OFF 0
319
320 /* Read Tx Power Level */
321 #define HCIC_PARAM_SIZE_R_TX_POWER 0
322
323 /* Read Default Erroneous Data Reporting */
324 #define HCIC_PARAM_SIZE_R_ERR_DATA_RPT 0
325
326 #define HCIC_PARAM_SIZE_ENHANCED_FLUSH 3
327
328 #define HCIC_PARAM_SIZE_SEND_KEYPRESS_NOTIF 7
329
330 #define HCI_SEND_KEYPRESS_NOTIF_BD_ADDR_OFF 0
331 #define HCI_SEND_KEYPRESS_NOTIF_NOTIF_OFF 6
332
333 /**** end of Simple Pairing Commands ****/
334
335 #define HCIC_PARAM_SIZE_SET_EVT_FILTER 9
336
337 #define HCI_FILT_COND_FILT_TYPE_OFF 0
338 #define HCI_FILT_COND_COND_TYPE_OFF 1
339 #define HCI_FILT_COND_FILT_OFF 2
340 /* Set Event Filter */
341
342 /* Delete Stored Key */
343 #define HCIC_PARAM_SIZE_DELETE_STORED_KEY 7
344
345 #define HCI_DELETE_KEY_BD_ADDR_OFF 0
346 #define HCI_DELETE_KEY_ALL_FLAG_OFF 6
347 /* Delete Stored Key */
348
349 /* Change Local Name */
350 #define HCIC_PARAM_SIZE_CHANGE_NAME BD_NAME_LEN
351
352 #define HCI_CHANGE_NAME_NAME_OFF 0
353 /* Change Local Name */
354
355 #define HCIC_PARAM_SIZE_READ_CMD 0
356
357 #define HCIC_PARAM_SIZE_WRITE_PARAM1 1
358
359 #define HCIC_WRITE_PARAM1_PARAM_OFF 0
360
361 #define HCIC_PARAM_SIZE_WRITE_PARAM2 2
362
363 #define HCIC_WRITE_PARAM2_PARAM_OFF 0
364
365 #define HCIC_PARAM_SIZE_WRITE_PARAM3 3
366
367 #define HCIC_WRITE_PARAM3_PARAM_OFF 0
368
369 #define HCIC_PARAM_SIZE_SET_AFH_CHANNELS 10
370
371 #define HCIC_PARAM_SIZE_ENH_SET_ESCO_CONN 59
372 #define HCIC_PARAM_SIZE_ENH_ACC_ESCO_CONN 63
373
374 #define HCIC_PARAM_SIZE_WRITE_PAGESCAN_CFG 4
375
376 #define HCI_SCAN_CFG_INTERVAL_OFF 0
377 #define HCI_SCAN_CFG_WINDOW_OFF 2
378 /* Write Page Scan Activity */
379
380 /* Write Inquiry Scan Activity */
381 #define HCIC_PARAM_SIZE_WRITE_INQSCAN_CFG 4
382
383 #define HCI_SCAN_CFG_INTERVAL_OFF 0
384 #define HCI_SCAN_CFG_WINDOW_OFF 2
385 /* Write Inquiry Scan Activity */
386
387 /* Host Controller to Host flow control */
388 #define HCI_HOST_FLOW_CTRL_OFF 0
389 #define HCI_HOST_FLOW_CTRL_ACL_ON 1
390 #define HCI_HOST_FLOW_CTRL_SCO_ON 2
391 #define HCI_HOST_FLOW_CTRL_BOTH_ON 3
392
393 #define HCIC_PARAM_SIZE_WRITE_AUTOMATIC_FLUSH_TIMEOUT 4
394
395 #define HCI_FLUSH_TOUT_HANDLE_OFF 0
396 #define HCI_FLUSH_TOUT_TOUT_OFF 2
397
398 #define HCIC_PARAM_SIZE_READ_TX_POWER 3
399
400 #define HCI_READ_TX_POWER_HANDLE_OFF 0
401 #define HCI_READ_TX_POWER_TYPE_OFF 2
402
403 /* Read transmit power level parameter */
404 #define HCI_READ_CURRENT 0x00
405 #define HCI_READ_MAXIMUM 0x01
406
407 #define HCIC_PARAM_SIZE_NUM_PKTS_DONE_SIZE sizeof(btmsg_hcic_num_pkts_done_t)
408
409 #define MAX_DATA_HANDLES 10
410
411 #define HCI_PKTS_DONE_NUM_HANDLES_OFF 0
412 #define HCI_PKTS_DONE_HANDLE_OFF 1
413 #define HCI_PKTS_DONE_NUM_PKTS_OFF 3
414
415 #define HCIC_PARAM_SIZE_WRITE_LINK_SUPER_TOUT 4
416
417 #define HCI_LINK_SUPER_TOUT_HANDLE_OFF 0
418 #define HCI_LINK_SUPER_TOUT_TOUT_OFF 2
419 /* Write Link Supervision Timeout */
420
421 #define MAX_IAC_LAPS 0x40
422
423 #define HCI_WRITE_IAC_LAP_NUM_OFF 0
424 #define HCI_WRITE_IAC_LAP_LAP_OFF 1
425 /* Write Current IAC LAP */
426
427 /*******************************************************************************
428 * BLE Commands
429 * Note: "local_controller_id" is for transport, not counted in HCI
430 * message size
431 ******************************************************************************/
432 #define HCIC_BLE_RAND_DI_SIZE 8
433 #define HCIC_BLE_IRK_SIZE 16
434
435 #define HCIC_PARAM_SIZE_SET_USED_FEAT_CMD 8
436 #define HCIC_PARAM_SIZE_WRITE_RANDOM_ADDR_CMD 6
437 #define HCIC_PARAM_SIZE_BLE_WRITE_ADV_PARAMS 15
438 #define HCIC_PARAM_SIZE_BLE_WRITE_SCAN_RSP 31
439 #define HCIC_PARAM_SIZE_WRITE_ADV_ENABLE 1
440 #define HCIC_PARAM_SIZE_BLE_WRITE_SCAN_PARAM 7
441 #define HCIC_PARAM_SIZE_BLE_WRITE_SCAN_ENABLE 2
442 #define HCIC_PARAM_SIZE_BLE_CREATE_LL_CONN 25
443 #define HCIC_PARAM_SIZE_BLE_CREATE_CONN_CANCEL 0
444 #define HCIC_PARAM_SIZE_CLEAR_ACCEPTLIST 0
445 #define HCIC_PARAM_SIZE_ADD_ACCEPTLIST 7
446 #define HCIC_PARAM_SIZE_REMOVE_ACCEPTLIST 7
447 #define HCIC_PARAM_SIZE_BLE_UPD_LL_CONN_PARAMS 14
448 #define HCIC_PARAM_SIZE_SET_HOST_CHNL_CLASS 5
449 #define HCIC_PARAM_SIZE_READ_CHNL_MAP 2
450 #define HCIC_PARAM_SIZE_BLE_READ_REMOTE_FEAT 2
451 #define HCIC_PARAM_SIZE_BLE_ENCRYPT 32
452 #define HCIC_PARAM_SIZE_WRITE_LE_HOST_SUPPORTED 2
453
454 #define HCIC_BLE_RAND_DI_SIZE 8
455 #define HCIC_BLE_ENCRYPT_KEY_SIZE 16
456 #define HCIC_PARAM_SIZE_BLE_START_ENC \
457 (4 + HCIC_BLE_RAND_DI_SIZE + HCIC_BLE_ENCRYPT_KEY_SIZE)
458 #define HCIC_PARAM_SIZE_LTK_REQ_REPLY (2 + HCIC_BLE_ENCRYPT_KEY_SIZE)
459 #define HCIC_PARAM_SIZE_LTK_REQ_NEG_REPLY 2
460 #define HCIC_BLE_CHNL_MAP_SIZE 5
461 #define HCIC_PARAM_SIZE_BLE_WRITE_ADV_DATA 31
462
463 #define HCIC_PARAM_SIZE_BLE_ADD_DEV_RESOLVING_LIST (7 + HCIC_BLE_IRK_SIZE * 2)
464 #define HCIC_PARAM_SIZE_BLE_RM_DEV_RESOLVING_LIST 7
465 #define HCIC_PARAM_SIZE_BLE_SET_PRIVACY_MODE 8
466 #define HCIC_PARAM_SIZE_BLE_CLEAR_RESOLVING_LIST 0
467 #define HCIC_PARAM_SIZE_BLE_READ_RESOLVING_LIST_SIZE 0
468 #define HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_PEER 7
469 #define HCIC_PARAM_SIZE_BLE_READ_RESOLVABLE_ADDR_LOCAL 7
470 #define HCIC_PARAM_SIZE_BLE_SET_ADDR_RESOLUTION_ENABLE 1
471 #define HCIC_PARAM_SIZE_BLE_SET_RAND_PRIV_ADDR_TIMOUT 2
472
473 #define HCIC_PARAM_SIZE_BLE_READ_PHY 2
474 #define HCIC_PARAM_SIZE_BLE_SET_DEFAULT_PHY 3
475 #define HCIC_PARAM_SIZE_BLE_SET_PHY 7
476 #define HCIC_PARAM_SIZE_BLE_ENH_RX_TEST 3
477 #define HCIC_PARAM_SIZE_BLE_ENH_TX_TEST 4
478
479 #define HCIC_PARAM_SIZE_BLE_SET_DATA_LENGTH 6
480 #define HCIC_PARAM_SIZE_BLE_WRITE_EXTENDED_SCAN_PARAM 11
481
482 #define HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_REPLY 14
483 #define HCIC_PARAM_SIZE_BLE_RC_PARAM_REQ_NEG_REPLY 3
484
btsnd_hcic_inquiry(const LAP inq_lap,uint8_t duration,uint8_t response_cnt)485 static void btsnd_hcic_inquiry(const LAP inq_lap, uint8_t duration,
486 uint8_t response_cnt) {
487 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
488 uint8_t* pp = (uint8_t*)(p + 1);
489
490 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_INQUIRY;
491 p->offset = 0;
492
493 UINT16_TO_STREAM(pp, HCI_INQUIRY);
494 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_INQUIRY);
495
496 LAP_TO_STREAM(pp, inq_lap);
497 UINT8_TO_STREAM(pp, duration);
498 UINT8_TO_STREAM(pp, response_cnt);
499
500 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
501 }
502
btsnd_hcic_inq_cancel(void)503 static void btsnd_hcic_inq_cancel(void) {
504 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
505 uint8_t* pp = (uint8_t*)(p + 1);
506
507 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_INQ_CANCEL;
508 p->offset = 0;
509 UINT16_TO_STREAM(pp, HCI_INQUIRY_CANCEL);
510 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_INQ_CANCEL);
511
512 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
513 }
514
btsnd_hcic_per_inq_mode(uint16_t max_period,uint16_t min_period,const LAP inq_lap,uint8_t duration,uint8_t response_cnt)515 void btsnd_hcic_per_inq_mode(uint16_t max_period, uint16_t min_period,
516 const LAP inq_lap, uint8_t duration,
517 uint8_t response_cnt) {
518 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
519 uint8_t* pp = (uint8_t*)(p + 1);
520
521 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PER_INQ_MODE;
522 p->offset = 0;
523
524 UINT16_TO_STREAM(pp, HCI_PERIODIC_INQUIRY_MODE);
525 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PER_INQ_MODE);
526
527 UINT16_TO_STREAM(pp, max_period);
528 UINT16_TO_STREAM(pp, min_period);
529 LAP_TO_STREAM(pp, inq_lap);
530 UINT8_TO_STREAM(pp, duration);
531 UINT8_TO_STREAM(pp, response_cnt);
532
533 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
534 }
535
btsnd_hcic_exit_per_inq(void)536 void btsnd_hcic_exit_per_inq(void) {
537 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
538 uint8_t* pp = (uint8_t*)(p + 1);
539
540 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_EXIT_PER_INQ;
541 p->offset = 0;
542 UINT16_TO_STREAM(pp, HCI_EXIT_PERIODIC_INQUIRY_MODE);
543 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_EXIT_PER_INQ);
544
545 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
546 }
547
btsnd_hcic_create_conn(const RawAddress & dest,uint16_t packet_types,uint8_t page_scan_rep_mode,uint8_t page_scan_mode,uint16_t clock_offset,uint8_t allow_switch)548 void btsnd_hcic_create_conn(const RawAddress& dest, uint16_t packet_types,
549 uint8_t page_scan_rep_mode, uint8_t page_scan_mode,
550 uint16_t clock_offset, uint8_t allow_switch) {
551 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
552 uint8_t* pp = (uint8_t*)(p + 1);
553
554 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CREATE_CONN;
555 p->offset = 0;
556
557 UINT16_TO_STREAM(pp, HCI_CREATE_CONNECTION);
558 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CREATE_CONN);
559 BDADDR_TO_STREAM(pp, dest);
560 UINT16_TO_STREAM(pp, packet_types);
561 UINT8_TO_STREAM(pp, page_scan_rep_mode);
562 UINT8_TO_STREAM(pp, page_scan_mode);
563 UINT16_TO_STREAM(pp, clock_offset);
564 UINT8_TO_STREAM(pp, allow_switch);
565 btm_acl_paging(p, dest);
566 }
567
btsnd_hcic_disconnect(uint16_t handle,uint8_t reason)568 static void btsnd_hcic_disconnect(uint16_t handle, uint8_t reason) {
569 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
570 uint8_t* pp = (uint8_t*)(p + 1);
571
572 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_DISCONNECT;
573 p->offset = 0;
574
575 UINT16_TO_STREAM(pp, HCI_DISCONNECT);
576 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_DISCONNECT);
577 UINT16_TO_STREAM(pp, handle);
578 UINT8_TO_STREAM(pp, reason);
579
580 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
581 }
582
btsnd_hcic_add_SCO_conn(uint16_t handle,uint16_t packet_types)583 void btsnd_hcic_add_SCO_conn(uint16_t handle, uint16_t packet_types) {
584 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
585 uint8_t* pp = (uint8_t*)(p + 1);
586
587 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ADD_SCO_CONN;
588 p->offset = 0;
589
590 UINT16_TO_STREAM(pp, HCI_ADD_SCO_CONNECTION);
591 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ADD_SCO_CONN);
592
593 UINT16_TO_STREAM(pp, handle);
594 UINT16_TO_STREAM(pp, packet_types);
595
596 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
597 }
598
btsnd_hcic_create_conn_cancel(const RawAddress & dest)599 void btsnd_hcic_create_conn_cancel(const RawAddress& dest) {
600 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
601 uint8_t* pp = (uint8_t*)(p + 1);
602
603 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CREATE_CONN_CANCEL;
604 p->offset = 0;
605
606 UINT16_TO_STREAM(pp, HCI_CREATE_CONNECTION_CANCEL);
607 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CREATE_CONN_CANCEL);
608
609 BDADDR_TO_STREAM(pp, dest);
610
611 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
612 }
613
btsnd_hcic_accept_conn(const RawAddress & dest,uint8_t role)614 void btsnd_hcic_accept_conn(const RawAddress& dest, uint8_t role) {
615 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
616 uint8_t* pp = (uint8_t*)(p + 1);
617
618 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ACCEPT_CONN;
619 p->offset = 0;
620
621 UINT16_TO_STREAM(pp, HCI_ACCEPT_CONNECTION_REQUEST);
622 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ACCEPT_CONN);
623 BDADDR_TO_STREAM(pp, dest);
624 UINT8_TO_STREAM(pp, role);
625
626 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
627 }
628
btsnd_hcic_reject_conn(const RawAddress & dest,uint8_t reason)629 void btsnd_hcic_reject_conn(const RawAddress& dest, uint8_t reason) {
630 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
631 uint8_t* pp = (uint8_t*)(p + 1);
632
633 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REJECT_CONN;
634 p->offset = 0;
635
636 UINT16_TO_STREAM(pp, HCI_REJECT_CONNECTION_REQUEST);
637 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REJECT_CONN);
638
639 BDADDR_TO_STREAM(pp, dest);
640 UINT8_TO_STREAM(pp, reason);
641
642 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
643 }
644
btsnd_hcic_link_key_req_reply(const RawAddress & bd_addr,const LinkKey & link_key)645 void btsnd_hcic_link_key_req_reply(const RawAddress& bd_addr,
646 const LinkKey& link_key) {
647 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
648 uint8_t* pp = (uint8_t*)(p + 1);
649
650 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LINK_KEY_REQ_REPLY;
651 p->offset = 0;
652
653 UINT16_TO_STREAM(pp, HCI_LINK_KEY_REQUEST_REPLY);
654 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LINK_KEY_REQ_REPLY);
655
656 BDADDR_TO_STREAM(pp, bd_addr);
657 ARRAY16_TO_STREAM(pp, link_key.data());
658
659 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
660 }
661
btsnd_hcic_link_key_neg_reply(const RawAddress & bd_addr)662 void btsnd_hcic_link_key_neg_reply(const RawAddress& bd_addr) {
663 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
664 uint8_t* pp = (uint8_t*)(p + 1);
665
666 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_LINK_KEY_NEG_REPLY;
667 p->offset = 0;
668
669 UINT16_TO_STREAM(pp, HCI_LINK_KEY_REQUEST_NEG_REPLY);
670 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_LINK_KEY_NEG_REPLY);
671
672 BDADDR_TO_STREAM(pp, bd_addr);
673
674 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
675 }
676
btsnd_hcic_pin_code_req_reply(const RawAddress & bd_addr,uint8_t pin_code_len,PIN_CODE pin_code)677 void btsnd_hcic_pin_code_req_reply(const RawAddress& bd_addr,
678 uint8_t pin_code_len, PIN_CODE pin_code) {
679 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
680 uint8_t* pp = (uint8_t*)(p + 1);
681 int i;
682
683 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PIN_CODE_REQ_REPLY;
684 p->offset = 0;
685
686 UINT16_TO_STREAM(pp, HCI_PIN_CODE_REQUEST_REPLY);
687 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PIN_CODE_REQ_REPLY);
688
689 BDADDR_TO_STREAM(pp, bd_addr);
690 UINT8_TO_STREAM(pp, pin_code_len);
691
692 for (i = 0; i < pin_code_len; i++) *pp++ = *pin_code++;
693
694 for (; i < PIN_CODE_LEN; i++) *pp++ = 0;
695
696 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
697 }
698
btsnd_hcic_pin_code_neg_reply(const RawAddress & bd_addr)699 void btsnd_hcic_pin_code_neg_reply(const RawAddress& bd_addr) {
700 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
701 uint8_t* pp = (uint8_t*)(p + 1);
702
703 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PIN_CODE_NEG_REPLY;
704 p->offset = 0;
705
706 UINT16_TO_STREAM(pp, HCI_PIN_CODE_REQUEST_NEG_REPLY);
707 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PIN_CODE_NEG_REPLY);
708
709 BDADDR_TO_STREAM(pp, bd_addr);
710
711 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
712 }
713
btsnd_hcic_change_conn_type(uint16_t handle,uint16_t packet_types)714 void btsnd_hcic_change_conn_type(uint16_t handle, uint16_t packet_types) {
715 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
716 uint8_t* pp = (uint8_t*)(p + 1);
717
718 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CHANGE_CONN_TYPE;
719 p->offset = 0;
720
721 UINT16_TO_STREAM(pp, HCI_CHANGE_CONN_PACKET_TYPE);
722 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CHANGE_CONN_TYPE);
723
724 UINT16_TO_STREAM(pp, handle);
725 UINT16_TO_STREAM(pp, packet_types);
726
727 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
728 }
729
btsnd_hcic_auth_request(uint16_t handle)730 void btsnd_hcic_auth_request(uint16_t handle) {
731 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
732 uint8_t* pp = (uint8_t*)(p + 1);
733
734 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
735 p->offset = 0;
736
737 UINT16_TO_STREAM(pp, HCI_AUTHENTICATION_REQUESTED);
738 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
739
740 UINT16_TO_STREAM(pp, handle);
741
742 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
743 }
744
btsnd_hcic_set_conn_encrypt(uint16_t handle,bool enable)745 void btsnd_hcic_set_conn_encrypt(uint16_t handle, bool enable) {
746 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
747 uint8_t* pp = (uint8_t*)(p + 1);
748
749 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SET_CONN_ENCRYPT;
750 p->offset = 0;
751
752 UINT16_TO_STREAM(pp, HCI_SET_CONN_ENCRYPTION);
753 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SET_CONN_ENCRYPT);
754
755 UINT16_TO_STREAM(pp, handle);
756 UINT8_TO_STREAM(pp, enable);
757
758 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
759 }
760
btsnd_hcic_rmt_name_req(const RawAddress & bd_addr,uint8_t page_scan_rep_mode,uint8_t page_scan_mode,uint16_t clock_offset)761 void btsnd_hcic_rmt_name_req(const RawAddress& bd_addr,
762 uint8_t page_scan_rep_mode, uint8_t page_scan_mode,
763 uint16_t clock_offset) {
764 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
765 uint8_t* pp = (uint8_t*)(p + 1);
766
767 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_RMT_NAME_REQ;
768 p->offset = 0;
769
770 UINT16_TO_STREAM(pp, HCI_RMT_NAME_REQUEST);
771 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_RMT_NAME_REQ);
772
773 BDADDR_TO_STREAM(pp, bd_addr);
774 UINT8_TO_STREAM(pp, page_scan_rep_mode);
775 UINT8_TO_STREAM(pp, page_scan_mode);
776 UINT16_TO_STREAM(pp, clock_offset);
777
778 btm_acl_paging(p, bd_addr);
779 }
780
btsnd_hcic_rmt_name_req_cancel(const RawAddress & bd_addr)781 void btsnd_hcic_rmt_name_req_cancel(const RawAddress& bd_addr) {
782 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
783 uint8_t* pp = (uint8_t*)(p + 1);
784
785 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_RMT_NAME_REQ_CANCEL;
786 p->offset = 0;
787
788 UINT16_TO_STREAM(pp, HCI_RMT_NAME_REQUEST_CANCEL);
789 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_RMT_NAME_REQ_CANCEL);
790
791 BDADDR_TO_STREAM(pp, bd_addr);
792
793 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
794 }
795
btsnd_hcic_rmt_features_req(uint16_t handle)796 void btsnd_hcic_rmt_features_req(uint16_t handle) {
797 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
798 uint8_t* pp = (uint8_t*)(p + 1);
799
800 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
801 p->offset = 0;
802
803 UINT16_TO_STREAM(pp, HCI_READ_RMT_FEATURES);
804 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
805
806 UINT16_TO_STREAM(pp, handle);
807
808 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
809 }
810
btsnd_hcic_rmt_ext_features(uint16_t handle,uint8_t page_num)811 void btsnd_hcic_rmt_ext_features(uint16_t handle, uint8_t page_num) {
812 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
813 uint8_t* pp = (uint8_t*)(p + 1);
814
815 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_RMT_EXT_FEATURES;
816 p->offset = 0;
817
818 UINT16_TO_STREAM(pp, HCI_READ_RMT_EXT_FEATURES);
819 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_RMT_EXT_FEATURES);
820
821 UINT16_TO_STREAM(pp, handle);
822 UINT8_TO_STREAM(pp, page_num);
823
824 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
825 }
826
btsnd_hcic_rmt_ver_req(uint16_t handle)827 void btsnd_hcic_rmt_ver_req(uint16_t handle) {
828 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
829 uint8_t* pp = (uint8_t*)(p + 1);
830
831 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
832 p->offset = 0;
833
834 UINT16_TO_STREAM(pp, HCI_READ_RMT_VERSION_INFO);
835 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
836
837 UINT16_TO_STREAM(pp, handle);
838
839 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
840 }
841
btsnd_hcic_read_rmt_clk_offset(uint16_t handle)842 void btsnd_hcic_read_rmt_clk_offset(uint16_t handle) {
843 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
844 uint8_t* pp = (uint8_t*)(p + 1);
845
846 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
847 p->offset = 0;
848
849 UINT16_TO_STREAM(pp, HCI_READ_RMT_CLOCK_OFFSET);
850 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
851
852 UINT16_TO_STREAM(pp, handle);
853
854 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
855 }
856
btsnd_hcic_read_lmp_handle(uint16_t handle)857 void btsnd_hcic_read_lmp_handle(uint16_t handle) {
858 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
859 uint8_t* pp = (uint8_t*)(p + 1);
860
861 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
862 p->offset = 0;
863
864 UINT16_TO_STREAM(pp, HCI_READ_LMP_HANDLE);
865 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
866
867 UINT16_TO_STREAM(pp, handle);
868
869 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
870 }
871
btsnd_hcic_setup_esco_conn(uint16_t handle,uint32_t transmit_bandwidth,uint32_t receive_bandwidth,uint16_t max_latency,uint16_t voice,uint8_t retrans_effort,uint16_t packet_types)872 void btsnd_hcic_setup_esco_conn(uint16_t handle, uint32_t transmit_bandwidth,
873 uint32_t receive_bandwidth,
874 uint16_t max_latency, uint16_t voice,
875 uint8_t retrans_effort, uint16_t packet_types) {
876 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
877 uint8_t* pp = (uint8_t*)(p + 1);
878
879 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SETUP_ESCO;
880 p->offset = 0;
881
882 UINT16_TO_STREAM(pp, HCI_SETUP_ESCO_CONNECTION);
883 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SETUP_ESCO);
884
885 UINT16_TO_STREAM(pp, handle);
886 UINT32_TO_STREAM(pp, transmit_bandwidth);
887 UINT32_TO_STREAM(pp, receive_bandwidth);
888 UINT16_TO_STREAM(pp, max_latency);
889 UINT16_TO_STREAM(pp, voice);
890 UINT8_TO_STREAM(pp, retrans_effort);
891 UINT16_TO_STREAM(pp, packet_types);
892
893 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
894 }
895
btsnd_hcic_accept_esco_conn(const RawAddress & bd_addr,uint32_t transmit_bandwidth,uint32_t receive_bandwidth,uint16_t max_latency,uint16_t content_fmt,uint8_t retrans_effort,uint16_t packet_types)896 void btsnd_hcic_accept_esco_conn(const RawAddress& bd_addr,
897 uint32_t transmit_bandwidth,
898 uint32_t receive_bandwidth,
899 uint16_t max_latency, uint16_t content_fmt,
900 uint8_t retrans_effort,
901 uint16_t packet_types) {
902 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
903 uint8_t* pp = (uint8_t*)(p + 1);
904
905 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ACCEPT_ESCO;
906 p->offset = 0;
907
908 UINT16_TO_STREAM(pp, HCI_ACCEPT_ESCO_CONNECTION);
909 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ACCEPT_ESCO);
910
911 BDADDR_TO_STREAM(pp, bd_addr);
912 UINT32_TO_STREAM(pp, transmit_bandwidth);
913 UINT32_TO_STREAM(pp, receive_bandwidth);
914 UINT16_TO_STREAM(pp, max_latency);
915 UINT16_TO_STREAM(pp, content_fmt);
916 UINT8_TO_STREAM(pp, retrans_effort);
917 UINT16_TO_STREAM(pp, packet_types);
918
919 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
920 }
921
btsnd_hcic_reject_esco_conn(const RawAddress & bd_addr,uint8_t reason)922 void btsnd_hcic_reject_esco_conn(const RawAddress& bd_addr, uint8_t reason) {
923 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
924 uint8_t* pp = (uint8_t*)(p + 1);
925
926 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REJECT_ESCO;
927 p->offset = 0;
928
929 UINT16_TO_STREAM(pp, HCI_REJECT_ESCO_CONNECTION);
930 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REJECT_ESCO);
931
932 BDADDR_TO_STREAM(pp, bd_addr);
933 UINT8_TO_STREAM(pp, reason);
934
935 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
936 }
937
btsnd_hcic_hold_mode(uint16_t handle,uint16_t max_hold_period,uint16_t min_hold_period)938 void btsnd_hcic_hold_mode(uint16_t handle, uint16_t max_hold_period,
939 uint16_t min_hold_period) {
940 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
941 uint8_t* pp = (uint8_t*)(p + 1);
942
943 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_HOLD_MODE;
944 p->offset = 0;
945
946 UINT16_TO_STREAM(pp, HCI_HOLD_MODE);
947 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_HOLD_MODE);
948
949 UINT16_TO_STREAM(pp, handle);
950 UINT16_TO_STREAM(pp, max_hold_period);
951 UINT16_TO_STREAM(pp, min_hold_period);
952
953 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
954 }
955
btsnd_hcic_sniff_mode(uint16_t handle,uint16_t max_sniff_period,uint16_t min_sniff_period,uint16_t sniff_attempt,uint16_t sniff_timeout)956 void btsnd_hcic_sniff_mode(uint16_t handle, uint16_t max_sniff_period,
957 uint16_t min_sniff_period, uint16_t sniff_attempt,
958 uint16_t sniff_timeout) {
959 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
960 uint8_t* pp = (uint8_t*)(p + 1);
961
962 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SNIFF_MODE;
963 p->offset = 0;
964
965 UINT16_TO_STREAM(pp, HCI_SNIFF_MODE);
966 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SNIFF_MODE);
967
968 UINT16_TO_STREAM(pp, handle);
969 UINT16_TO_STREAM(pp, max_sniff_period);
970 UINT16_TO_STREAM(pp, min_sniff_period);
971 UINT16_TO_STREAM(pp, sniff_attempt);
972 UINT16_TO_STREAM(pp, sniff_timeout);
973
974 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
975 }
976
btsnd_hcic_exit_sniff_mode(uint16_t handle)977 void btsnd_hcic_exit_sniff_mode(uint16_t handle) {
978 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
979 uint8_t* pp = (uint8_t*)(p + 1);
980
981 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
982 p->offset = 0;
983
984 UINT16_TO_STREAM(pp, HCI_EXIT_SNIFF_MODE);
985 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
986
987 UINT16_TO_STREAM(pp, handle);
988
989 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
990 }
991
btsnd_hcic_park_mode(uint16_t handle,uint16_t beacon_max_interval,uint16_t beacon_min_interval)992 void btsnd_hcic_park_mode(uint16_t handle, uint16_t beacon_max_interval,
993 uint16_t beacon_min_interval) {
994 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
995 uint8_t* pp = (uint8_t*)(p + 1);
996
997 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_PARK_MODE;
998 p->offset = 0;
999
1000 UINT16_TO_STREAM(pp, HCI_PARK_MODE);
1001 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_PARK_MODE);
1002
1003 UINT16_TO_STREAM(pp, handle);
1004 UINT16_TO_STREAM(pp, beacon_max_interval);
1005 UINT16_TO_STREAM(pp, beacon_min_interval);
1006
1007 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1008 }
1009
btsnd_hcic_exit_park_mode(uint16_t handle)1010 void btsnd_hcic_exit_park_mode(uint16_t handle) {
1011 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1012 uint8_t* pp = (uint8_t*)(p + 1);
1013
1014 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1015 p->offset = 0;
1016
1017 UINT16_TO_STREAM(pp, HCI_EXIT_PARK_MODE);
1018 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1019
1020 UINT16_TO_STREAM(pp, handle);
1021
1022 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1023 }
1024
btsnd_hcic_qos_setup(uint16_t handle,uint8_t flags,uint8_t service_type,uint32_t token_rate,uint32_t peak,uint32_t latency,uint32_t delay_var)1025 void btsnd_hcic_qos_setup(uint16_t handle, uint8_t flags, uint8_t service_type,
1026 uint32_t token_rate, uint32_t peak, uint32_t latency,
1027 uint32_t delay_var) {
1028 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1029 uint8_t* pp = (uint8_t*)(p + 1);
1030
1031 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_QOS_SETUP;
1032 p->offset = 0;
1033
1034 UINT16_TO_STREAM(pp, HCI_QOS_SETUP);
1035 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_QOS_SETUP);
1036
1037 UINT16_TO_STREAM(pp, handle);
1038 UINT8_TO_STREAM(pp, flags);
1039 UINT8_TO_STREAM(pp, service_type);
1040 UINT32_TO_STREAM(pp, token_rate);
1041 UINT32_TO_STREAM(pp, peak);
1042 UINT32_TO_STREAM(pp, latency);
1043 UINT32_TO_STREAM(pp, delay_var);
1044
1045 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1046 }
1047
btsnd_hcic_switch_role(const RawAddress & bd_addr,uint8_t role)1048 static void btsnd_hcic_switch_role(const RawAddress& bd_addr, uint8_t role) {
1049 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1050 uint8_t* pp = (uint8_t*)(p + 1);
1051
1052 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SWITCH_ROLE;
1053 p->offset = 0;
1054
1055 UINT16_TO_STREAM(pp, HCI_SWITCH_ROLE);
1056 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SWITCH_ROLE);
1057
1058 BDADDR_TO_STREAM(pp, bd_addr);
1059 UINT8_TO_STREAM(pp, role);
1060
1061 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1062 }
1063
btsnd_hcic_write_policy_set(uint16_t handle,uint16_t settings)1064 void btsnd_hcic_write_policy_set(uint16_t handle, uint16_t settings) {
1065 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1066 uint8_t* pp = (uint8_t*)(p + 1);
1067
1068 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_POLICY_SET;
1069 p->offset = 0;
1070 UINT16_TO_STREAM(pp, HCI_WRITE_POLICY_SETTINGS);
1071 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_POLICY_SET);
1072
1073 UINT16_TO_STREAM(pp, handle);
1074 UINT16_TO_STREAM(pp, settings);
1075
1076 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1077 }
1078
btsnd_hcic_write_def_policy_set(uint16_t settings)1079 void btsnd_hcic_write_def_policy_set(uint16_t settings) {
1080 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1081 uint8_t* pp = (uint8_t*)(p + 1);
1082
1083 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_DEF_POLICY_SET;
1084 p->offset = 0;
1085 UINT16_TO_STREAM(pp, HCI_WRITE_DEF_POLICY_SETTINGS);
1086 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_DEF_POLICY_SET);
1087
1088 UINT16_TO_STREAM(pp, settings);
1089
1090 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1091 }
1092
btsnd_hcic_set_event_filter(uint8_t filt_type,uint8_t filt_cond_type,uint8_t * filt_cond,uint8_t filt_cond_len)1093 void btsnd_hcic_set_event_filter(uint8_t filt_type, uint8_t filt_cond_type,
1094 uint8_t* filt_cond, uint8_t filt_cond_len) {
1095 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1096 uint8_t* pp = (uint8_t*)(p + 1);
1097
1098 p->offset = 0;
1099
1100 UINT16_TO_STREAM(pp, HCI_SET_EVENT_FILTER);
1101
1102 if (filt_type) {
1103 p->len = (uint16_t)(HCIC_PREAMBLE_SIZE + 2 + filt_cond_len);
1104 UINT8_TO_STREAM(pp, (uint8_t)(2 + filt_cond_len));
1105
1106 UINT8_TO_STREAM(pp, filt_type);
1107 UINT8_TO_STREAM(pp, filt_cond_type);
1108
1109 if (filt_cond_type == HCI_FILTER_COND_DEVICE_CLASS) {
1110 DEVCLASS_TO_STREAM(pp, filt_cond);
1111 filt_cond += DEV_CLASS_LEN;
1112 DEVCLASS_TO_STREAM(pp, filt_cond);
1113 filt_cond += DEV_CLASS_LEN;
1114
1115 filt_cond_len -= (2 * DEV_CLASS_LEN);
1116 } else if (filt_cond_type == HCI_FILTER_COND_BD_ADDR) {
1117 BDADDR_TO_STREAM(pp, *((RawAddress*)filt_cond));
1118 filt_cond += BD_ADDR_LEN;
1119
1120 filt_cond_len -= BD_ADDR_LEN;
1121 }
1122
1123 if (filt_cond_len) ARRAY_TO_STREAM(pp, filt_cond, filt_cond_len);
1124 } else {
1125 p->len = (uint16_t)(HCIC_PREAMBLE_SIZE + 1);
1126 UINT8_TO_STREAM(pp, 1);
1127
1128 UINT8_TO_STREAM(pp, filt_type);
1129 }
1130
1131 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1132 }
1133
btsnd_hcic_write_pin_type(uint8_t type)1134 void btsnd_hcic_write_pin_type(uint8_t type) {
1135 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1136 uint8_t* pp = (uint8_t*)(p + 1);
1137
1138 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1139 p->offset = 0;
1140
1141 UINT16_TO_STREAM(pp, HCI_WRITE_PIN_TYPE);
1142 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1143
1144 UINT8_TO_STREAM(pp, type);
1145
1146 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1147 }
1148
btsnd_hcic_delete_stored_key(const RawAddress & bd_addr,bool delete_all_flag)1149 void btsnd_hcic_delete_stored_key(const RawAddress& bd_addr,
1150 bool delete_all_flag) {
1151 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1152 uint8_t* pp = (uint8_t*)(p + 1);
1153
1154 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_DELETE_STORED_KEY;
1155 p->offset = 0;
1156
1157 UINT16_TO_STREAM(pp, HCI_DELETE_STORED_LINK_KEY);
1158 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_DELETE_STORED_KEY);
1159
1160 BDADDR_TO_STREAM(pp, bd_addr);
1161 UINT8_TO_STREAM(pp, delete_all_flag);
1162
1163 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1164 }
1165
btsnd_hcic_change_name(BD_NAME name)1166 void btsnd_hcic_change_name(BD_NAME name) {
1167 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1168 uint8_t* pp = (uint8_t*)(p + 1);
1169 uint16_t len = strlen((char*)name) + 1;
1170
1171 memset(pp, 0, HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CHANGE_NAME);
1172
1173 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CHANGE_NAME;
1174 p->offset = 0;
1175
1176 UINT16_TO_STREAM(pp, HCI_CHANGE_LOCAL_NAME);
1177 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CHANGE_NAME);
1178
1179 if (len > HCIC_PARAM_SIZE_CHANGE_NAME) len = HCIC_PARAM_SIZE_CHANGE_NAME;
1180
1181 ARRAY_TO_STREAM(pp, name, len);
1182
1183 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1184 }
1185
btsnd_hcic_read_name(void)1186 void btsnd_hcic_read_name(void) {
1187 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1188 uint8_t* pp = (uint8_t*)(p + 1);
1189
1190 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD;
1191 p->offset = 0;
1192
1193 UINT16_TO_STREAM(pp, HCI_READ_LOCAL_NAME);
1194 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD);
1195
1196 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1197 }
1198
btsnd_hcic_write_page_tout(uint16_t timeout)1199 void btsnd_hcic_write_page_tout(uint16_t timeout) {
1200 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1201 uint8_t* pp = (uint8_t*)(p + 1);
1202
1203 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM2;
1204 p->offset = 0;
1205
1206 UINT16_TO_STREAM(pp, HCI_WRITE_PAGE_TOUT);
1207 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM2);
1208
1209 UINT16_TO_STREAM(pp, timeout);
1210
1211 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1212 }
1213
btsnd_hcic_write_scan_enable(uint8_t flag)1214 void btsnd_hcic_write_scan_enable(uint8_t flag) {
1215 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1216 uint8_t* pp = (uint8_t*)(p + 1);
1217
1218 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1219 p->offset = 0;
1220
1221 UINT16_TO_STREAM(pp, HCI_WRITE_SCAN_ENABLE);
1222 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1223
1224 UINT8_TO_STREAM(pp, flag);
1225
1226 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1227 }
1228
btsnd_hcic_write_pagescan_cfg(uint16_t interval,uint16_t window)1229 void btsnd_hcic_write_pagescan_cfg(uint16_t interval, uint16_t window) {
1230 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1231 uint8_t* pp = (uint8_t*)(p + 1);
1232
1233 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PAGESCAN_CFG;
1234 p->offset = 0;
1235
1236 UINT16_TO_STREAM(pp, HCI_WRITE_PAGESCAN_CFG);
1237 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PAGESCAN_CFG);
1238
1239 UINT16_TO_STREAM(pp, interval);
1240 UINT16_TO_STREAM(pp, window);
1241
1242 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1243 }
1244
btsnd_hcic_write_inqscan_cfg(uint16_t interval,uint16_t window)1245 void btsnd_hcic_write_inqscan_cfg(uint16_t interval, uint16_t window) {
1246 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1247 uint8_t* pp = (uint8_t*)(p + 1);
1248
1249 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_INQSCAN_CFG;
1250 p->offset = 0;
1251
1252 UINT16_TO_STREAM(pp, HCI_WRITE_INQUIRYSCAN_CFG);
1253 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_INQSCAN_CFG);
1254
1255 UINT16_TO_STREAM(pp, interval);
1256 UINT16_TO_STREAM(pp, window);
1257
1258 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1259 }
1260
btsnd_hcic_write_auth_enable(uint8_t flag)1261 void btsnd_hcic_write_auth_enable(uint8_t flag) {
1262 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1263 uint8_t* pp = (uint8_t*)(p + 1);
1264
1265 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1266 p->offset = 0;
1267
1268 UINT16_TO_STREAM(pp, HCI_WRITE_AUTHENTICATION_ENABLE);
1269 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1270
1271 UINT8_TO_STREAM(pp, flag);
1272
1273 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1274 }
1275
btsnd_hcic_write_dev_class(DEV_CLASS dev_class)1276 void btsnd_hcic_write_dev_class(DEV_CLASS dev_class) {
1277 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1278 uint8_t* pp = (uint8_t*)(p + 1);
1279
1280 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM3;
1281 p->offset = 0;
1282
1283 UINT16_TO_STREAM(pp, HCI_WRITE_CLASS_OF_DEVICE);
1284 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM3);
1285
1286 DEVCLASS_TO_STREAM(pp, dev_class);
1287
1288 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1289 }
1290
btsnd_hcic_write_voice_settings(uint16_t flags)1291 void btsnd_hcic_write_voice_settings(uint16_t flags) {
1292 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1293 uint8_t* pp = (uint8_t*)(p + 1);
1294
1295 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM2;
1296 p->offset = 0;
1297
1298 UINT16_TO_STREAM(pp, HCI_WRITE_VOICE_SETTINGS);
1299 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM2);
1300
1301 UINT16_TO_STREAM(pp, flags);
1302
1303 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1304 }
1305
btsnd_hcic_write_auto_flush_tout(uint16_t handle,uint16_t tout)1306 void btsnd_hcic_write_auto_flush_tout(uint16_t handle, uint16_t tout) {
1307 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1308 uint8_t* pp = (uint8_t*)(p + 1);
1309
1310 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_AUTOMATIC_FLUSH_TIMEOUT;
1311 p->offset = 0;
1312
1313 UINT16_TO_STREAM(pp, HCI_WRITE_AUTOMATIC_FLUSH_TIMEOUT);
1314 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_AUTOMATIC_FLUSH_TIMEOUT);
1315
1316 UINT16_TO_STREAM(pp, handle);
1317 UINT16_TO_STREAM(pp, tout);
1318
1319 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1320 }
1321
btsnd_hcic_read_tx_power(uint16_t handle,uint8_t type)1322 void btsnd_hcic_read_tx_power(uint16_t handle, uint8_t type) {
1323 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1324 uint8_t* pp = (uint8_t*)(p + 1);
1325
1326 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_TX_POWER;
1327 p->offset = 0;
1328
1329 UINT16_TO_STREAM(pp, HCI_READ_TRANSMIT_POWER_LEVEL);
1330 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_TX_POWER);
1331
1332 UINT16_TO_STREAM(pp, handle);
1333 UINT8_TO_STREAM(pp, type);
1334
1335 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1336 }
1337
btsnd_hcic_host_num_xmitted_pkts(uint8_t num_handles,uint16_t * handle,uint16_t * num_pkts)1338 void btsnd_hcic_host_num_xmitted_pkts(uint8_t num_handles, uint16_t* handle,
1339 uint16_t* num_pkts) {
1340 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1341 uint8_t* pp = (uint8_t*)(p + 1);
1342
1343 p->len = HCIC_PREAMBLE_SIZE + 1 + (num_handles * 4);
1344 p->offset = 0;
1345
1346 UINT16_TO_STREAM(pp, HCI_HOST_NUM_PACKETS_DONE);
1347 UINT8_TO_STREAM(pp, p->len - HCIC_PREAMBLE_SIZE);
1348
1349 UINT8_TO_STREAM(pp, num_handles);
1350
1351 for (int i = 0; i < num_handles; i++) {
1352 UINT16_TO_STREAM(pp, handle[i]);
1353 UINT16_TO_STREAM(pp, num_pkts[i]);
1354 }
1355
1356 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1357 }
1358
btsnd_hcic_write_link_super_tout(uint8_t local_controller_id,uint16_t handle,uint16_t timeout)1359 void btsnd_hcic_write_link_super_tout(uint8_t local_controller_id,
1360 uint16_t handle, uint16_t timeout) {
1361 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1362 uint8_t* pp = (uint8_t*)(p + 1);
1363
1364 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_LINK_SUPER_TOUT;
1365 p->offset = 0;
1366
1367 UINT16_TO_STREAM(pp, HCI_WRITE_LINK_SUPER_TOUT);
1368 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_LINK_SUPER_TOUT);
1369
1370 UINT16_TO_STREAM(pp, handle);
1371 UINT16_TO_STREAM(pp, timeout);
1372
1373 btu_hcif_send_cmd(local_controller_id, p);
1374 }
1375
btsnd_hcic_write_cur_iac_lap(uint8_t num_cur_iac,LAP * const iac_lap)1376 void btsnd_hcic_write_cur_iac_lap(uint8_t num_cur_iac, LAP* const iac_lap) {
1377 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1378 uint8_t* pp = (uint8_t*)(p + 1);
1379
1380 p->len = HCIC_PREAMBLE_SIZE + 1 + (LAP_LEN * num_cur_iac);
1381 p->offset = 0;
1382
1383 UINT16_TO_STREAM(pp, HCI_WRITE_CURRENT_IAC_LAP);
1384 UINT8_TO_STREAM(pp, p->len - HCIC_PREAMBLE_SIZE);
1385
1386 UINT8_TO_STREAM(pp, num_cur_iac);
1387
1388 for (int i = 0; i < num_cur_iac; i++) LAP_TO_STREAM(pp, iac_lap[i]);
1389
1390 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1391 }
1392
1393 /******************************************
1394 * Lisbon Features
1395 ******************************************/
btsnd_hcic_sniff_sub_rate(uint16_t handle,uint16_t max_lat,uint16_t min_remote_lat,uint16_t min_local_lat)1396 void btsnd_hcic_sniff_sub_rate(uint16_t handle, uint16_t max_lat,
1397 uint16_t min_remote_lat,
1398 uint16_t min_local_lat) {
1399 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1400 uint8_t* pp = (uint8_t*)(p + 1);
1401
1402 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SNIFF_SUB_RATE;
1403 p->offset = 0;
1404
1405 UINT16_TO_STREAM(pp, HCI_SNIFF_SUB_RATE);
1406 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SNIFF_SUB_RATE);
1407
1408 UINT16_TO_STREAM(pp, handle);
1409 UINT16_TO_STREAM(pp, max_lat);
1410 UINT16_TO_STREAM(pp, min_remote_lat);
1411 UINT16_TO_STREAM(pp, min_local_lat);
1412
1413 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1414 }
1415
1416 /**** Extended Inquiry Response Commands ****/
btsnd_hcic_write_ext_inquiry_response(void * buffer,uint8_t fec_req)1417 void btsnd_hcic_write_ext_inquiry_response(void* buffer, uint8_t fec_req) {
1418 BT_HDR* p = (BT_HDR*)buffer;
1419 uint8_t* pp = (uint8_t*)(p + 1);
1420
1421 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_EXT_INQ_RESP;
1422 p->offset = 0;
1423
1424 UINT16_TO_STREAM(pp, HCI_WRITE_EXT_INQ_RESPONSE);
1425 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_EXT_INQ_RESP);
1426
1427 UINT8_TO_STREAM(pp, fec_req);
1428
1429 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1430 }
1431
btsnd_hcic_io_cap_req_reply(const RawAddress & bd_addr,uint8_t capability,uint8_t oob_present,uint8_t auth_req)1432 void btsnd_hcic_io_cap_req_reply(const RawAddress& bd_addr, uint8_t capability,
1433 uint8_t oob_present, uint8_t auth_req) {
1434 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1435 uint8_t* pp = (uint8_t*)(p + 1);
1436
1437 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_IO_CAP_RESP;
1438 p->offset = 0;
1439
1440 UINT16_TO_STREAM(pp, HCI_IO_CAPABILITY_REQUEST_REPLY);
1441 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_IO_CAP_RESP);
1442
1443 BDADDR_TO_STREAM(pp, bd_addr);
1444 UINT8_TO_STREAM(pp, capability);
1445 UINT8_TO_STREAM(pp, oob_present);
1446 UINT8_TO_STREAM(pp, auth_req);
1447
1448 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1449 }
1450
btsnd_hcic_enhanced_set_up_synchronous_connection(uint16_t conn_handle,enh_esco_params_t * p_params)1451 void btsnd_hcic_enhanced_set_up_synchronous_connection(
1452 uint16_t conn_handle, enh_esco_params_t* p_params) {
1453 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1454 uint8_t* pp = (uint8_t*)(p + 1);
1455
1456 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ENH_SET_ESCO_CONN;
1457 p->offset = 0;
1458
1459 UINT16_TO_STREAM(pp, HCI_ENH_SETUP_ESCO_CONNECTION);
1460 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ENH_SET_ESCO_CONN);
1461
1462 UINT16_TO_STREAM(pp, conn_handle);
1463 UINT32_TO_STREAM(pp, p_params->transmit_bandwidth);
1464 UINT32_TO_STREAM(pp, p_params->receive_bandwidth);
1465 UINT8_TO_STREAM(pp, p_params->transmit_coding_format.coding_format);
1466 UINT16_TO_STREAM(pp, p_params->transmit_coding_format.company_id);
1467 UINT16_TO_STREAM(pp,
1468 p_params->transmit_coding_format.vendor_specific_codec_id);
1469 UINT8_TO_STREAM(pp, p_params->receive_coding_format.coding_format);
1470 UINT16_TO_STREAM(pp, p_params->receive_coding_format.company_id);
1471 UINT16_TO_STREAM(pp,
1472 p_params->receive_coding_format.vendor_specific_codec_id);
1473 UINT16_TO_STREAM(pp, p_params->transmit_codec_frame_size);
1474 UINT16_TO_STREAM(pp, p_params->receive_codec_frame_size);
1475 UINT32_TO_STREAM(pp, p_params->input_bandwidth);
1476 UINT32_TO_STREAM(pp, p_params->output_bandwidth);
1477 UINT8_TO_STREAM(pp, p_params->input_coding_format.coding_format);
1478 UINT16_TO_STREAM(pp, p_params->input_coding_format.company_id);
1479 UINT16_TO_STREAM(pp, p_params->input_coding_format.vendor_specific_codec_id);
1480 UINT8_TO_STREAM(pp, p_params->output_coding_format.coding_format);
1481 UINT16_TO_STREAM(pp, p_params->output_coding_format.company_id);
1482 UINT16_TO_STREAM(pp, p_params->output_coding_format.vendor_specific_codec_id);
1483 UINT16_TO_STREAM(pp, p_params->input_coded_data_size);
1484 UINT16_TO_STREAM(pp, p_params->output_coded_data_size);
1485 UINT8_TO_STREAM(pp, p_params->input_pcm_data_format);
1486 UINT8_TO_STREAM(pp, p_params->output_pcm_data_format);
1487 UINT8_TO_STREAM(pp, p_params->input_pcm_payload_msb_position);
1488 UINT8_TO_STREAM(pp, p_params->output_pcm_payload_msb_position);
1489 UINT8_TO_STREAM(pp, p_params->input_data_path);
1490 UINT8_TO_STREAM(pp, p_params->output_data_path);
1491 UINT8_TO_STREAM(pp, p_params->input_transport_unit_size);
1492 UINT8_TO_STREAM(pp, p_params->output_transport_unit_size);
1493 UINT16_TO_STREAM(pp, p_params->max_latency_ms);
1494 UINT16_TO_STREAM(pp, p_params->packet_types);
1495 UINT8_TO_STREAM(pp, p_params->retransmission_effort);
1496
1497 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1498 }
1499
btsnd_hcic_enhanced_accept_synchronous_connection(const RawAddress & bd_addr,enh_esco_params_t * p_params)1500 void btsnd_hcic_enhanced_accept_synchronous_connection(
1501 const RawAddress& bd_addr, enh_esco_params_t* p_params) {
1502 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1503 uint8_t* pp = (uint8_t*)(p + 1);
1504
1505 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ENH_ACC_ESCO_CONN;
1506 p->offset = 0;
1507
1508 UINT16_TO_STREAM(pp, HCI_ENH_ACCEPT_ESCO_CONNECTION);
1509 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ENH_ACC_ESCO_CONN);
1510
1511 BDADDR_TO_STREAM(pp, bd_addr);
1512 UINT32_TO_STREAM(pp, p_params->transmit_bandwidth);
1513 UINT32_TO_STREAM(pp, p_params->receive_bandwidth);
1514 UINT8_TO_STREAM(pp, p_params->transmit_coding_format.coding_format);
1515 UINT16_TO_STREAM(pp, p_params->transmit_coding_format.company_id);
1516 UINT16_TO_STREAM(pp,
1517 p_params->transmit_coding_format.vendor_specific_codec_id);
1518 UINT8_TO_STREAM(pp, p_params->receive_coding_format.coding_format);
1519 UINT16_TO_STREAM(pp, p_params->receive_coding_format.company_id);
1520 UINT16_TO_STREAM(pp,
1521 p_params->receive_coding_format.vendor_specific_codec_id);
1522 UINT16_TO_STREAM(pp, p_params->transmit_codec_frame_size);
1523 UINT16_TO_STREAM(pp, p_params->receive_codec_frame_size);
1524 UINT32_TO_STREAM(pp, p_params->input_bandwidth);
1525 UINT32_TO_STREAM(pp, p_params->output_bandwidth);
1526 UINT8_TO_STREAM(pp, p_params->input_coding_format.coding_format);
1527 UINT16_TO_STREAM(pp, p_params->input_coding_format.company_id);
1528 UINT16_TO_STREAM(pp, p_params->input_coding_format.vendor_specific_codec_id);
1529 UINT8_TO_STREAM(pp, p_params->output_coding_format.coding_format);
1530 UINT16_TO_STREAM(pp, p_params->output_coding_format.company_id);
1531 UINT16_TO_STREAM(pp, p_params->output_coding_format.vendor_specific_codec_id);
1532 UINT16_TO_STREAM(pp, p_params->input_coded_data_size);
1533 UINT16_TO_STREAM(pp, p_params->output_coded_data_size);
1534 UINT8_TO_STREAM(pp, p_params->input_pcm_data_format);
1535 UINT8_TO_STREAM(pp, p_params->output_pcm_data_format);
1536 UINT8_TO_STREAM(pp, p_params->input_pcm_payload_msb_position);
1537 UINT8_TO_STREAM(pp, p_params->output_pcm_payload_msb_position);
1538 UINT8_TO_STREAM(pp, p_params->input_data_path);
1539 UINT8_TO_STREAM(pp, p_params->output_data_path);
1540 UINT8_TO_STREAM(pp, p_params->input_transport_unit_size);
1541 UINT8_TO_STREAM(pp, p_params->output_transport_unit_size);
1542 UINT16_TO_STREAM(pp, p_params->max_latency_ms);
1543 UINT16_TO_STREAM(pp, p_params->packet_types);
1544 UINT8_TO_STREAM(pp, p_params->retransmission_effort);
1545
1546 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1547 }
1548
btsnd_hcic_io_cap_req_neg_reply(const RawAddress & bd_addr,uint8_t err_code)1549 void btsnd_hcic_io_cap_req_neg_reply(const RawAddress& bd_addr,
1550 uint8_t err_code) {
1551 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1552 uint8_t* pp = (uint8_t*)(p + 1);
1553
1554 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_IO_CAP_NEG_REPLY;
1555 p->offset = 0;
1556
1557 UINT16_TO_STREAM(pp, HCI_IO_CAP_REQ_NEG_REPLY);
1558 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_IO_CAP_NEG_REPLY);
1559
1560 BDADDR_TO_STREAM(pp, bd_addr);
1561 UINT8_TO_STREAM(pp, err_code);
1562
1563 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1564 }
1565
btsnd_hcic_read_local_oob_data(void)1566 void btsnd_hcic_read_local_oob_data(void) {
1567 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1568 uint8_t* pp = (uint8_t*)(p + 1);
1569
1570 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_R_LOCAL_OOB;
1571 p->offset = 0;
1572
1573 UINT16_TO_STREAM(pp, HCI_READ_LOCAL_OOB_DATA);
1574 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_R_LOCAL_OOB);
1575
1576 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1577 }
1578
btsnd_hcic_user_conf_reply(const RawAddress & bd_addr,bool is_yes)1579 void btsnd_hcic_user_conf_reply(const RawAddress& bd_addr, bool is_yes) {
1580 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1581 uint8_t* pp = (uint8_t*)(p + 1);
1582
1583 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_UCONF_REPLY;
1584 p->offset = 0;
1585
1586 if (!is_yes) {
1587 /* Negative reply */
1588 UINT16_TO_STREAM(pp, HCI_USER_CONF_VALUE_NEG_REPLY);
1589 } else {
1590 /* Confirmation */
1591 UINT16_TO_STREAM(pp, HCI_USER_CONF_REQUEST_REPLY);
1592 }
1593
1594 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_UCONF_REPLY);
1595
1596 BDADDR_TO_STREAM(pp, bd_addr);
1597
1598 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1599 }
1600
btsnd_hcic_user_passkey_reply(const RawAddress & bd_addr,uint32_t value)1601 void btsnd_hcic_user_passkey_reply(const RawAddress& bd_addr, uint32_t value) {
1602 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1603 uint8_t* pp = (uint8_t*)(p + 1);
1604
1605 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_U_PKEY_REPLY;
1606 p->offset = 0;
1607
1608 UINT16_TO_STREAM(pp, HCI_USER_PASSKEY_REQ_REPLY);
1609 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_U_PKEY_REPLY);
1610
1611 BDADDR_TO_STREAM(pp, bd_addr);
1612 UINT32_TO_STREAM(pp, value);
1613
1614 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1615 }
1616
btsnd_hcic_user_passkey_neg_reply(const RawAddress & bd_addr)1617 void btsnd_hcic_user_passkey_neg_reply(const RawAddress& bd_addr) {
1618 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1619 uint8_t* pp = (uint8_t*)(p + 1);
1620
1621 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_U_PKEY_NEG_REPLY;
1622 p->offset = 0;
1623
1624 UINT16_TO_STREAM(pp, HCI_USER_PASSKEY_REQ_NEG_REPLY);
1625 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_U_PKEY_NEG_REPLY);
1626
1627 BDADDR_TO_STREAM(pp, bd_addr);
1628
1629 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1630 }
1631
btsnd_hcic_rem_oob_reply(const RawAddress & bd_addr,const Octet16 & c,const Octet16 & r)1632 void btsnd_hcic_rem_oob_reply(const RawAddress& bd_addr, const Octet16& c,
1633 const Octet16& r) {
1634 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1635 uint8_t* pp = (uint8_t*)(p + 1);
1636
1637 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REM_OOB_REPLY;
1638 p->offset = 0;
1639
1640 UINT16_TO_STREAM(pp, HCI_REM_OOB_DATA_REQ_REPLY);
1641 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REM_OOB_REPLY);
1642
1643 BDADDR_TO_STREAM(pp, bd_addr);
1644 ARRAY16_TO_STREAM(pp, c.data());
1645 ARRAY16_TO_STREAM(pp, r.data());
1646
1647 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1648 }
1649
btsnd_hcic_rem_oob_neg_reply(const RawAddress & bd_addr)1650 void btsnd_hcic_rem_oob_neg_reply(const RawAddress& bd_addr) {
1651 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1652 uint8_t* pp = (uint8_t*)(p + 1);
1653
1654 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_REM_OOB_NEG_REPLY;
1655 p->offset = 0;
1656
1657 UINT16_TO_STREAM(pp, HCI_REM_OOB_DATA_REQ_NEG_REPLY);
1658 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_REM_OOB_NEG_REPLY);
1659
1660 BDADDR_TO_STREAM(pp, bd_addr);
1661
1662 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1663 }
1664
btsnd_hcic_read_inq_tx_power(void)1665 void btsnd_hcic_read_inq_tx_power(void) {
1666 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1667 uint8_t* pp = (uint8_t*)(p + 1);
1668
1669 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_R_TX_POWER;
1670 p->offset = 0;
1671
1672 UINT16_TO_STREAM(pp, HCI_READ_INQ_TX_POWER_LEVEL);
1673 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_R_TX_POWER);
1674
1675 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1676 }
1677
btsnd_hcic_send_keypress_notif(const RawAddress & bd_addr,uint8_t notif)1678 void btsnd_hcic_send_keypress_notif(const RawAddress& bd_addr, uint8_t notif) {
1679 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1680 uint8_t* pp = (uint8_t*)(p + 1);
1681
1682 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_SEND_KEYPRESS_NOTIF;
1683 p->offset = 0;
1684
1685 UINT16_TO_STREAM(pp, HCI_SEND_KEYPRESS_NOTIF);
1686 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_SEND_KEYPRESS_NOTIF);
1687
1688 BDADDR_TO_STREAM(pp, bd_addr);
1689 UINT8_TO_STREAM(pp, notif);
1690
1691 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1692 }
1693
1694 /**** end of Simple Pairing Commands ****/
1695
btsnd_hcic_enhanced_flush(uint16_t handle,uint8_t packet_type)1696 void btsnd_hcic_enhanced_flush(uint16_t handle, uint8_t packet_type) {
1697 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1698 uint8_t* pp = (uint8_t*)(p + 1);
1699
1700 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_ENHANCED_FLUSH;
1701 p->offset = 0;
1702 UINT16_TO_STREAM(pp, HCI_ENHANCED_FLUSH);
1703 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_ENHANCED_FLUSH);
1704
1705 UINT16_TO_STREAM(pp, handle);
1706 UINT8_TO_STREAM(pp, packet_type);
1707
1708 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1709 }
1710
1711 /*************************
1712 * End of Lisbon Commands
1713 *************************/
1714
btsnd_hcic_get_link_quality(uint16_t handle)1715 void btsnd_hcic_get_link_quality(uint16_t handle) {
1716 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1717 uint8_t* pp = (uint8_t*)(p + 1);
1718
1719 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1720 p->offset = 0;
1721
1722 UINT16_TO_STREAM(pp, HCI_GET_LINK_QUALITY);
1723 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1724
1725 UINT16_TO_STREAM(pp, handle);
1726
1727 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1728 }
1729
btsnd_hcic_read_rssi(uint16_t handle)1730 void btsnd_hcic_read_rssi(uint16_t handle) {
1731 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1732 uint8_t* pp = (uint8_t*)(p + 1);
1733
1734 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1735 p->offset = 0;
1736
1737 UINT16_TO_STREAM(pp, HCI_READ_RSSI);
1738 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1739
1740 UINT16_TO_STREAM(pp, handle);
1741
1742 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1743 }
1744
read_encryption_key_size_complete(ReadEncKeySizeCb cb,uint8_t * return_parameters,uint16_t return_parameters_length)1745 static void read_encryption_key_size_complete(ReadEncKeySizeCb cb, uint8_t* return_parameters,
1746 uint16_t return_parameters_length) {
1747 uint8_t status;
1748 uint16_t handle;
1749 uint8_t key_size;
1750 STREAM_TO_UINT8(status, return_parameters);
1751 STREAM_TO_UINT16(handle, return_parameters);
1752 STREAM_TO_UINT8(key_size, return_parameters);
1753
1754 std::move(cb).Run(status, handle, key_size);
1755 }
1756
btsnd_hcic_read_encryption_key_size(uint16_t handle,ReadEncKeySizeCb cb)1757 void btsnd_hcic_read_encryption_key_size(uint16_t handle, ReadEncKeySizeCb cb) {
1758 constexpr uint8_t len = 2;
1759 uint8_t param[len];
1760 memset(param, 0, len);
1761
1762 uint8_t* p = param;
1763 UINT16_TO_STREAM(p, handle);
1764
1765 btu_hcif_send_cmd_with_cb(FROM_HERE, HCI_READ_ENCR_KEY_SIZE, param, len,
1766 base::Bind(&read_encryption_key_size_complete, base::Passed(&cb)));
1767 }
1768
btsnd_hcic_read_failed_contact_counter(uint16_t handle)1769 void btsnd_hcic_read_failed_contact_counter(uint16_t handle) {
1770 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1771 uint8_t* pp = (uint8_t*)(p + 1);
1772
1773 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1774 p->offset = 0;
1775
1776 UINT16_TO_STREAM(pp, HCI_READ_FAILED_CONTACT_COUNTER);
1777 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1778
1779 UINT16_TO_STREAM(pp, handle);
1780
1781 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1782 }
1783
btsnd_hcic_read_automatic_flush_timeout(uint16_t handle)1784 void btsnd_hcic_read_automatic_flush_timeout(uint16_t handle) {
1785 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1786 uint8_t* pp = (uint8_t*)(p + 1);
1787
1788 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_CMD_HANDLE;
1789 p->offset = 0;
1790
1791 UINT16_TO_STREAM(pp, HCI_READ_AUTOMATIC_FLUSH_TIMEOUT);
1792 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_CMD_HANDLE);
1793
1794 UINT16_TO_STREAM(pp, handle);
1795
1796 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1797 }
1798
btsnd_hcic_enable_test_mode(void)1799 void btsnd_hcic_enable_test_mode(void) {
1800 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1801 uint8_t* pp = (uint8_t*)(p + 1);
1802
1803 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_READ_CMD;
1804 p->offset = 0;
1805
1806 UINT16_TO_STREAM(pp, HCI_ENABLE_DEV_UNDER_TEST_MODE);
1807 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_READ_CMD);
1808
1809 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1810 }
1811
btsnd_hcic_write_inqscan_type(uint8_t type)1812 void btsnd_hcic_write_inqscan_type(uint8_t type) {
1813 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1814 uint8_t* pp = (uint8_t*)(p + 1);
1815
1816 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1817 p->offset = 0;
1818
1819 UINT16_TO_STREAM(pp, HCI_WRITE_INQSCAN_TYPE);
1820 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1821
1822 UINT8_TO_STREAM(pp, type);
1823
1824 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1825 }
1826
btsnd_hcic_write_inquiry_mode(uint8_t mode)1827 void btsnd_hcic_write_inquiry_mode(uint8_t mode) {
1828 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1829 uint8_t* pp = (uint8_t*)(p + 1);
1830
1831 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1832 p->offset = 0;
1833
1834 UINT16_TO_STREAM(pp, HCI_WRITE_INQUIRY_MODE);
1835 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1836
1837 UINT8_TO_STREAM(pp, mode);
1838
1839 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1840 }
1841
btsnd_hcic_write_pagescan_type(uint8_t type)1842 void btsnd_hcic_write_pagescan_type(uint8_t type) {
1843 BT_HDR* p = (BT_HDR*)osi_malloc(HCI_CMD_BUF_SIZE);
1844 uint8_t* pp = (uint8_t*)(p + 1);
1845
1846 p->len = HCIC_PREAMBLE_SIZE + HCIC_PARAM_SIZE_WRITE_PARAM1;
1847 p->offset = 0;
1848
1849 UINT16_TO_STREAM(pp, HCI_WRITE_PAGESCAN_TYPE);
1850 UINT8_TO_STREAM(pp, HCIC_PARAM_SIZE_WRITE_PARAM1);
1851
1852 UINT8_TO_STREAM(pp, type);
1853
1854 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1855 }
1856
1857 /* Must have room to store BT_HDR + max VSC length + callback pointer */
1858 #if (HCI_CMD_BUF_SIZE < 268)
1859 #error "HCI_CMD_BUF_SIZE must be larger than 268"
1860 #endif
1861
btsnd_hcic_vendor_spec_cmd(void * buffer,uint16_t opcode,uint8_t len,uint8_t * p_data,void * p_cmd_cplt_cback)1862 void btsnd_hcic_vendor_spec_cmd(void* buffer, uint16_t opcode, uint8_t len,
1863 uint8_t* p_data, void* p_cmd_cplt_cback) {
1864 BT_HDR* p = (BT_HDR*)buffer;
1865 uint8_t* pp = (uint8_t*)(p + 1);
1866
1867 p->len = HCIC_PREAMBLE_SIZE + len;
1868 p->offset = sizeof(void*);
1869
1870 *((void**)pp) =
1871 p_cmd_cplt_cback; /* Store command complete callback in buffer */
1872 pp += sizeof(void*); /* Skip over callback pointer */
1873
1874 UINT16_TO_STREAM(pp, HCI_GRP_VENDOR_SPECIFIC | opcode);
1875 UINT8_TO_STREAM(pp, len);
1876 ARRAY_TO_STREAM(pp, p_data, len);
1877
1878 btu_hcif_send_cmd(LOCAL_BR_EDR_CONTROLLER_ID, p);
1879 }
1880
1881 bluetooth::legacy::hci::Interface interface_ = {
1882 // LINK_CONTROL
1883 .StartInquiry = btsnd_hcic_inquiry, // OCF 0x0401
1884 .InquiryCancel = btsnd_hcic_inq_cancel, // OCF 0x0402
1885 .StartPeriodicInquiryMode = btsnd_hcic_per_inq_mode, // OCF 0x0403
1886 .ExitPeriodicInquiryMode = btsnd_hcic_exit_per_inq, // OCF 0x0404
1887 .CreateConnection = btsnd_hcic_create_conn, // OCF 0x0405
1888 .Disconnect = btsnd_hcic_disconnect, // OCF 0x0406
1889 // UNUSED OCF 0x0407 btsnd_hcic_add_SCO_conn
1890 .CreateConnectionCancel = btsnd_hcic_create_conn_cancel, // OCF 0x0408
1891 .AcceptConnectionRequest = btsnd_hcic_accept_conn, // OCF 0x0409
1892 .RejectConnectionRequest = btsnd_hcic_reject_conn, // OCF 0x040A
1893 .LinkKeyRequestReply = btsnd_hcic_link_key_req_reply, // OCF 0x040B
1894 .LinkKeyRequestNegativeReply =
1895 btsnd_hcic_link_key_neg_reply, // OCF 0x040C,
1896 .PinCodeRequestReply = btsnd_hcic_pin_code_req_reply, // OCF 0x040D,
1897 .PinCodeRequestNegativeReply =
1898 btsnd_hcic_pin_code_neg_reply, // OCF 0x040E,
1899 .ChangeConnectionPacketType = btsnd_hcic_change_conn_type, // OCF 0x040F,
1900 // UNUSED OCF 0x0410
1901 .AuthenticationRequested = btsnd_hcic_auth_request, // OCF 0x0411,
1902 // UNUSED OCF 0x0412
1903 .SetConnectionEncryption = btsnd_hcic_set_conn_encrypt, // OCF 0x0413,
1904 // UNUSED OCF 0x0414
1905 .ChangeConnectionLinkKey = nullptr, // OCF 0x0415,
1906 // UNUSED OCF 0x0416
1907 .CentralLinkKey = nullptr, // OCF 0x0417,
1908 // UNUSED OCF 0x0418
1909 .RemoteNameRequest = btsnd_hcic_rmt_name_req, // OCF 0x0419,
1910 .RemoteNameRequestCancel = btsnd_hcic_rmt_name_req_cancel, // OCF 0x041A,
1911 .ReadRemoteSupportedFeatures = btsnd_hcic_rmt_features_req, // OCF 0x041B,
1912 .ReadRemoteExtendedFeatures = btsnd_hcic_rmt_ext_features, // OCF 0x041C,
1913 .ReadRemoteVersionInformation = btsnd_hcic_rmt_ver_req, // OCF 0x041D,
1914 // UNUSED OCF 0x041E
1915 .ReadClockOffset = btsnd_hcic_read_rmt_clk_offset, // OCF 0x041F,
1916 .ReadLmpHandle = btsnd_hcic_read_lmp_handle, // OCF 0x0420,
1917 // UNUSED OCF 0x0420 - 0x0427
1918 .SetupSynchronousConnection = btsnd_hcic_setup_esco_conn, // OCF 0x0428,
1919 .AcceptSynchronousConnection = btsnd_hcic_accept_esco_conn, // OCF 0x0429,
1920 .RejectSynchronousConnection = btsnd_hcic_reject_esco_conn, // OCF 0x042A,
1921 .IoCapabilityRequestReply = btsnd_hcic_io_cap_req_reply, // OCF 0x042B,
1922 .UserConfirmationRequestReply = btsnd_hcic_user_conf_reply, // OCF 0x042C,
1923 .UserConfirmationRequestNegativeReply =
1924 btsnd_hcic_user_conf_reply, // OCF 0x042D,
1925 .UserPasskeyRequestReply = btsnd_hcic_user_passkey_reply, // OCF 0x042E,
1926 .UserPasskeyRequestNegativeReply =
1927 btsnd_hcic_user_passkey_neg_reply, // OCF 0x042F,
1928 .RemoteOobDataRequestReply = btsnd_hcic_rem_oob_reply, // OCF 0x0430,
1929 // UNUSED OCF 0x0431 - 0x0432
1930 .RemoteOobDataRequestNegativeReply =
1931 btsnd_hcic_rem_oob_neg_reply, // OCF 0x0433,
1932 .IoCapabilityRequestNegativeReply =
1933 btsnd_hcic_io_cap_req_neg_reply, // OCF 0x0434,
1934 // UNUSED OCF 0x0435 - 0x043C
1935 .EnhancedSetupSynchronousConnection =
1936 btsnd_hcic_enhanced_set_up_synchronous_connection, // OCF 0x043D,
1937 .EnhancedAcceptSynchronousConnection =
1938 btsnd_hcic_enhanced_accept_synchronous_connection, // OCF 0x043E,
1939 // UNUSED OCF 0x043F - 0x0444
1940 .RemoteOobExtendedDataRequestReply = nullptr, // OCF 0x0445,
1941
1942 // LINK_POLICY
1943 .HoldMode = btsnd_hcic_hold_mode, // OCF 0x0801,
1944 // UNUSED OCF 0x0802
1945 .SniffMode = btsnd_hcic_sniff_mode, // OCF 0x0803,
1946 .ExitSniffMode = btsnd_hcic_exit_sniff_mode, // OCF 0x0804,
1947 // UNUSED OCF 0x0805 - 0x0806
1948 .QosSetup = btsnd_hcic_qos_setup, // OCF 0x0807,
1949 // UNUSED OCF 0x0808
1950 .RoleDiscovery = nullptr, // OCF 0x0809,
1951 // UNUSED OCF 0x080A
1952 .StartRoleSwitch = btsnd_hcic_switch_role, // OCF 0x080B,
1953 .ReadLinkPolicySettings = nullptr, // OCF 0x080C,
1954 .WriteLinkPolicySettings = btsnd_hcic_write_policy_set, // OCF 0x080D,
1955 .ReadDefaultLinkPolicySettings = nullptr, // OCF 0x080E,
1956 .WriteDefaultLinkPolicySettings =
1957 btsnd_hcic_write_def_policy_set, // OCF 0x080F,
1958 .FlowSpecification = nullptr, // OCF 0x0810,
1959 .SniffSubrating = btsnd_hcic_sniff_sub_rate, // OCF 0x0811,
1960
1961 // CONTROLLER_AND_BASEBAND
1962 .SetEventMask = nullptr, // OCF 0x0C01,
1963 // UNUSED OCF 0x0C02
1964 .Reset = nullptr, // OCF 0x0C03,
1965 // UNUSED OCF 0x0C04
1966 .SetEventFilter = btsnd_hcic_set_event_filter, // OCF 0x0C05,
1967 // UNUSED OCF 0x0C06 = 0x0C07
1968 .Flush = nullptr, // OCF 0x0C08,
1969 .ReadPinType = nullptr, // OCF 0x0C09,
1970 .WritePinType = btsnd_hcic_write_pin_type, // OCF 0x0C0A,
1971 .CreateNewUnitKey = nullptr, // OCF 0x0C0B,
1972 // UNUSED OCF 0x0C0C
1973 .ReadStoredLinkKey = nullptr, // OCF 0x0C0D,
1974 // UNUSED OCF 0x0C0E - 0x0C10
1975 .WriteStoredLinkKey = nullptr, // OCF 0x0C11,
1976 .DeleteStoredLinkKey = btsnd_hcic_delete_stored_key, // OCF 0x0C12,
1977 .WriteLocalName = btsnd_hcic_change_name, // OCF 0x0C13,
1978 .ReadLocalName = btsnd_hcic_read_name, // OCF 0x0C14,
1979 .ReadConnectionAcceptTimeout = nullptr, // OCF 0x0C15,
1980 .WriteConnectionAcceptTimeout = btsnd_hcic_write_page_tout, // OCF 0x0C16,
1981 .ReadPageTimeout = nullptr, // OCF 0x0C17,
1982 .WritePageTimeout = nullptr, // OCF 0x0C18,
1983 .ReadScanEnable = nullptr, // OCF 0x0C19,
1984 .WriteScanEnable = btsnd_hcic_write_scan_enable, // OCF 0x0C1A,
1985 .ReadPageScanActivity = nullptr, // OCF 0x0C1B,
1986 .WritePageScanActivity = btsnd_hcic_write_pagescan_cfg, // OCF 0x0C1C,
1987 .ReadInquiryScanActivity = nullptr, // OCF 0x0C1D,
1988 .WriteInquiryScanActivity = btsnd_hcic_write_inqscan_cfg, // OCF 0x0C1E,
1989 .ReadAuthenticationEnable = nullptr, // OCF 0x0C1F,
1990 // UNUSED OCF 0x0C20 - 0x0C22
1991 .ReadClassOfDevice = nullptr, // OCF 0x0C23,
1992 .WriteClassOfDevice = btsnd_hcic_write_dev_class, // OCF 0x0C24,
1993 .ReadVoiceSetting = nullptr, // OCF 0x0C25,
1994 .WriteVoiceSetting = btsnd_hcic_write_voice_settings, // OCF 0x0C26,
1995 .ReadAutomaticFlushTimeout =
1996 btsnd_hcic_read_automatic_flush_timeout, // OCF 0x0C27,
1997 .WriteAutomaticFlushTimeout =
1998 btsnd_hcic_write_auto_flush_tout, // OCF 0x0C28,
1999 .ReadNumBroadcastRetransmits = nullptr, // OCF 0x0C29,
2000 .WriteNumBroadcastRetransmits = nullptr, // OCF 0x0C2A,
2001 .ReadHoldModeActivity = nullptr, // OCF 0x0C2B,
2002 .WriteHoldModeActivity = nullptr, // OCF 0x0C2C,
2003 .ReadTransmitPowerLevel = btsnd_hcic_read_tx_power, // OCF 0x0C2D,
2004 .ReadSynchronousFlowControlEnable = nullptr, // OCF 0x0C2E,
2005 .WriteSynchronousFlowControlEnable = nullptr, // OCF 0x0C2F,
2006 // UNUSED OCF 0x0C30
2007 .SetControllerToHostFlowControl = nullptr, // OCF 0x0C31,
2008 // UNUSED OCF 0x0C32
2009 .HostBufferSize = nullptr, // OCF 0x0C33,
2010 // UNUSED OCF 0x0C34
2011 .HostNumCompletedPackets = nullptr, // OCF 0x0C35,
2012 .ReadLinkSupervisionTimeout =
2013 btsnd_hcic_write_link_super_tout, // OCF 0x0C36,
2014 .WriteLinkSupervisionTimeout = nullptr, // OCF 0x0C37,
2015 .ReadNumberOfSupportedIac = nullptr, // OCF 0x0C38,
2016 .ReadCurrentIacLap = nullptr, // OCF 0x0C39,
2017 .WriteCurrentIacLap = btsnd_hcic_write_cur_iac_lap, // OCF 0x0C3A,
2018 .SetAfhHostChannelClassification = nullptr, // OCF 0x0C3F,
2019 .ReadInquiryScanType = nullptr, // OCF 0x0C42,
2020 .WriteInquiryScanType = btsnd_hcic_write_inqscan_type, // OCF 0x0C43,
2021 .ReadInquiryMode = nullptr, // OCF 0x0C44,
2022 .WriteInquiryMode = btsnd_hcic_write_inquiry_mode, // OCF 0x0C45,
2023 .ReadPageScanType = nullptr, // OCF 0x0C46,
2024 .WritePageScanType = btsnd_hcic_write_pagescan_type, // OCF 0x0C47,
2025 .ReadAfhChannelAssessmentMode = nullptr, // OCF 0x0C48,
2026 .WriteAfhChannelAssessmentMode = nullptr, // OCF 0x0C49,
2027 .ReadExtendedInquiryResponse = nullptr, // OCF 0x0C51,
2028 .WriteExtendedInquiryResponse =
2029 btsnd_hcic_write_ext_inquiry_response, // OCF 0x0C52,
2030 .RefreshEncryptionKey = nullptr, // OCF 0x0C53,
2031 .ReadSimplePairingMode = nullptr, // OCF 0x0C55,
2032 .WriteSimplePairingMode = nullptr, // OCF 0x0C56,
2033 .ReadLocalOobData = btsnd_hcic_read_local_oob_data, // OCF 0x0C57,
2034 .ReadInquiryResponseTransmitPowerLevel = nullptr, // OCF 0x0C58,
2035 .WriteInquiryTransmitPowerLevel = nullptr, // OCF 0x0C59,
2036 .EnhancedFlush = btsnd_hcic_enhanced_flush, // OCF 0x0C5F,
2037 .SendKeypressNotification = btsnd_hcic_send_keypress_notif, // OCF 0x0C60,
2038
2039 // STATUS_PARAMETERS
2040 .ReadFailedContactCounter =
2041 btsnd_hcic_read_failed_contact_counter, // OCF 0x1401,
2042 .ResetFailedContactCounter = nullptr, // OCF 0x1402,
2043 .ReadLinkQuality = btsnd_hcic_get_link_quality, // OCF 0x1403,
2044 // UNUSED OCF 0x1404
2045 .ReadRssi = btsnd_hcic_read_rssi, // OCF 0x1405,
2046 .ReadAfhChannelMap = nullptr, // OCF 0x1406,
2047 .ReadClock = nullptr, // OCF 0x1407,
2048 .ReadEncryptionKeySize = nullptr, // OCF 0x1408,
2049 };
2050
2051 const bluetooth::legacy::hci::Interface&
GetInterface()2052 bluetooth::legacy::hci::GetInterface() {
2053 return interface_;
2054 }
2055