1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPIVFIO_H 20 #define _UAPIVFIO_H 21 #include <linux/types.h> 22 #include <linux/ioctl.h> 23 #define VFIO_API_VERSION 0 24 #define VFIO_TYPE1_IOMMU 1 25 #define VFIO_SPAPR_TCE_IOMMU 2 26 #define VFIO_TYPE1v2_IOMMU 3 27 #define VFIO_DMA_CC_IOMMU 4 28 #define VFIO_EEH 5 29 #define VFIO_TYPE1_NESTING_IOMMU 6 30 #define VFIO_SPAPR_TCE_v2_IOMMU 7 31 #define VFIO_NOIOMMU_IOMMU 8 32 #define VFIO_UNMAP_ALL 9 33 #define VFIO_UPDATE_VADDR 10 34 #define VFIO_TYPE (';') 35 #define VFIO_BASE 100 36 struct vfio_info_cap_header { 37 __u16 id; 38 __u16 version; 39 __u32 next; 40 }; 41 #define VFIO_GET_API_VERSION _IO(VFIO_TYPE, VFIO_BASE + 0) 42 #define VFIO_CHECK_EXTENSION _IO(VFIO_TYPE, VFIO_BASE + 1) 43 #define VFIO_SET_IOMMU _IO(VFIO_TYPE, VFIO_BASE + 2) 44 struct vfio_group_status { 45 __u32 argsz; 46 __u32 flags; 47 #define VFIO_GROUP_FLAGS_VIABLE (1 << 0) 48 #define VFIO_GROUP_FLAGS_CONTAINER_SET (1 << 1) 49 }; 50 #define VFIO_GROUP_GET_STATUS _IO(VFIO_TYPE, VFIO_BASE + 3) 51 #define VFIO_GROUP_SET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 4) 52 #define VFIO_GROUP_UNSET_CONTAINER _IO(VFIO_TYPE, VFIO_BASE + 5) 53 #define VFIO_GROUP_GET_DEVICE_FD _IO(VFIO_TYPE, VFIO_BASE + 6) 54 struct vfio_device_info { 55 __u32 argsz; 56 __u32 flags; 57 #define VFIO_DEVICE_FLAGS_RESET (1 << 0) 58 #define VFIO_DEVICE_FLAGS_PCI (1 << 1) 59 #define VFIO_DEVICE_FLAGS_PLATFORM (1 << 2) 60 #define VFIO_DEVICE_FLAGS_AMBA (1 << 3) 61 #define VFIO_DEVICE_FLAGS_CCW (1 << 4) 62 #define VFIO_DEVICE_FLAGS_AP (1 << 5) 63 #define VFIO_DEVICE_FLAGS_FSL_MC (1 << 6) 64 #define VFIO_DEVICE_FLAGS_CAPS (1 << 7) 65 __u32 num_regions; 66 __u32 num_irqs; 67 __u32 cap_offset; 68 }; 69 #define VFIO_DEVICE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 7) 70 #define VFIO_DEVICE_API_PCI_STRING "vfio-pci" 71 #define VFIO_DEVICE_API_PLATFORM_STRING "vfio-platform" 72 #define VFIO_DEVICE_API_AMBA_STRING "vfio-amba" 73 #define VFIO_DEVICE_API_CCW_STRING "vfio-ccw" 74 #define VFIO_DEVICE_API_AP_STRING "vfio-ap" 75 #define VFIO_DEVICE_INFO_CAP_ZPCI_BASE 1 76 #define VFIO_DEVICE_INFO_CAP_ZPCI_GROUP 2 77 #define VFIO_DEVICE_INFO_CAP_ZPCI_UTIL 3 78 #define VFIO_DEVICE_INFO_CAP_ZPCI_PFIP 4 79 struct vfio_region_info { 80 __u32 argsz; 81 __u32 flags; 82 #define VFIO_REGION_INFO_FLAG_READ (1 << 0) 83 #define VFIO_REGION_INFO_FLAG_WRITE (1 << 1) 84 #define VFIO_REGION_INFO_FLAG_MMAP (1 << 2) 85 #define VFIO_REGION_INFO_FLAG_CAPS (1 << 3) 86 __u32 index; 87 __u32 cap_offset; 88 __u64 size; 89 __u64 offset; 90 }; 91 #define VFIO_DEVICE_GET_REGION_INFO _IO(VFIO_TYPE, VFIO_BASE + 8) 92 #define VFIO_REGION_INFO_CAP_SPARSE_MMAP 1 93 struct vfio_region_sparse_mmap_area { 94 __u64 offset; 95 __u64 size; 96 }; 97 struct vfio_region_info_cap_sparse_mmap { 98 struct vfio_info_cap_header header; 99 __u32 nr_areas; 100 __u32 reserved; 101 struct vfio_region_sparse_mmap_area areas[]; 102 }; 103 #define VFIO_REGION_INFO_CAP_TYPE 2 104 struct vfio_region_info_cap_type { 105 struct vfio_info_cap_header header; 106 __u32 type; 107 __u32 subtype; 108 }; 109 #define VFIO_REGION_TYPE_PCI_VENDOR_TYPE (1 << 31) 110 #define VFIO_REGION_TYPE_PCI_VENDOR_MASK (0xffff) 111 #define VFIO_REGION_TYPE_GFX (1) 112 #define VFIO_REGION_TYPE_CCW (2) 113 #define VFIO_REGION_TYPE_MIGRATION (3) 114 #define VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION (1) 115 #define VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG (2) 116 #define VFIO_REGION_SUBTYPE_INTEL_IGD_LPC_CFG (3) 117 #define VFIO_REGION_SUBTYPE_NVIDIA_NVLINK2_RAM (1) 118 #define VFIO_REGION_SUBTYPE_IBM_NVLINK2_ATSD (1) 119 #define VFIO_REGION_SUBTYPE_GFX_EDID (1) 120 struct vfio_region_gfx_edid { 121 __u32 edid_offset; 122 __u32 edid_max_size; 123 __u32 edid_size; 124 __u32 max_xres; 125 __u32 max_yres; 126 __u32 link_state; 127 #define VFIO_DEVICE_GFX_LINK_STATE_UP 1 128 #define VFIO_DEVICE_GFX_LINK_STATE_DOWN 2 129 }; 130 #define VFIO_REGION_SUBTYPE_CCW_ASYNC_CMD (1) 131 #define VFIO_REGION_SUBTYPE_CCW_SCHIB (2) 132 #define VFIO_REGION_SUBTYPE_CCW_CRW (3) 133 #define VFIO_REGION_SUBTYPE_MIGRATION (1) 134 struct vfio_device_migration_info { 135 __u32 device_state; 136 #define VFIO_DEVICE_STATE_STOP (0) 137 #define VFIO_DEVICE_STATE_RUNNING (1 << 0) 138 #define VFIO_DEVICE_STATE_SAVING (1 << 1) 139 #define VFIO_DEVICE_STATE_RESUMING (1 << 2) 140 #define VFIO_DEVICE_STATE_MASK (VFIO_DEVICE_STATE_RUNNING | VFIO_DEVICE_STATE_SAVING | VFIO_DEVICE_STATE_RESUMING) 141 #define VFIO_DEVICE_STATE_VALID(state) (state & VFIO_DEVICE_STATE_RESUMING ? (state & VFIO_DEVICE_STATE_MASK) == VFIO_DEVICE_STATE_RESUMING : 1) 142 #define VFIO_DEVICE_STATE_IS_ERROR(state) ((state & VFIO_DEVICE_STATE_MASK) == (VFIO_DEVICE_STATE_SAVING | VFIO_DEVICE_STATE_RESUMING)) 143 #define VFIO_DEVICE_STATE_SET_ERROR(state) ((state & ~VFIO_DEVICE_STATE_MASK) | VFIO_DEVICE_SATE_SAVING | VFIO_DEVICE_STATE_RESUMING) 144 __u32 reserved; 145 __u64 pending_bytes; 146 __u64 data_offset; 147 __u64 data_size; 148 }; 149 #define VFIO_REGION_INFO_CAP_MSIX_MAPPABLE 3 150 #define VFIO_REGION_INFO_CAP_NVLINK2_SSATGT 4 151 struct vfio_region_info_cap_nvlink2_ssatgt { 152 struct vfio_info_cap_header header; 153 __u64 tgt; 154 }; 155 #define VFIO_REGION_INFO_CAP_NVLINK2_LNKSPD 5 156 struct vfio_region_info_cap_nvlink2_lnkspd { 157 struct vfio_info_cap_header header; 158 __u32 link_speed; 159 __u32 __pad; 160 }; 161 struct vfio_irq_info { 162 __u32 argsz; 163 __u32 flags; 164 #define VFIO_IRQ_INFO_EVENTFD (1 << 0) 165 #define VFIO_IRQ_INFO_MASKABLE (1 << 1) 166 #define VFIO_IRQ_INFO_AUTOMASKED (1 << 2) 167 #define VFIO_IRQ_INFO_NORESIZE (1 << 3) 168 __u32 index; 169 __u32 count; 170 }; 171 #define VFIO_DEVICE_GET_IRQ_INFO _IO(VFIO_TYPE, VFIO_BASE + 9) 172 struct vfio_irq_set { 173 __u32 argsz; 174 __u32 flags; 175 #define VFIO_IRQ_SET_DATA_NONE (1 << 0) 176 #define VFIO_IRQ_SET_DATA_BOOL (1 << 1) 177 #define VFIO_IRQ_SET_DATA_EVENTFD (1 << 2) 178 #define VFIO_IRQ_SET_ACTION_MASK (1 << 3) 179 #define VFIO_IRQ_SET_ACTION_UNMASK (1 << 4) 180 #define VFIO_IRQ_SET_ACTION_TRIGGER (1 << 5) 181 __u32 index; 182 __u32 start; 183 __u32 count; 184 __u8 data[]; 185 }; 186 #define VFIO_DEVICE_SET_IRQS _IO(VFIO_TYPE, VFIO_BASE + 10) 187 #define VFIO_IRQ_SET_DATA_TYPE_MASK (VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_DATA_BOOL | VFIO_IRQ_SET_DATA_EVENTFD) 188 #define VFIO_IRQ_SET_ACTION_TYPE_MASK (VFIO_IRQ_SET_ACTION_MASK | VFIO_IRQ_SET_ACTION_UNMASK | VFIO_IRQ_SET_ACTION_TRIGGER) 189 #define VFIO_DEVICE_RESET _IO(VFIO_TYPE, VFIO_BASE + 11) 190 enum { 191 VFIO_PCI_BAR0_REGION_INDEX, 192 VFIO_PCI_BAR1_REGION_INDEX, 193 VFIO_PCI_BAR2_REGION_INDEX, 194 VFIO_PCI_BAR3_REGION_INDEX, 195 VFIO_PCI_BAR4_REGION_INDEX, 196 VFIO_PCI_BAR5_REGION_INDEX, 197 VFIO_PCI_ROM_REGION_INDEX, 198 VFIO_PCI_CONFIG_REGION_INDEX, 199 VFIO_PCI_VGA_REGION_INDEX, 200 VFIO_PCI_NUM_REGIONS = 9 201 }; 202 enum { 203 VFIO_PCI_INTX_IRQ_INDEX, 204 VFIO_PCI_MSI_IRQ_INDEX, 205 VFIO_PCI_MSIX_IRQ_INDEX, 206 VFIO_PCI_ERR_IRQ_INDEX, 207 VFIO_PCI_REQ_IRQ_INDEX, 208 VFIO_PCI_NUM_IRQS 209 }; 210 enum { 211 VFIO_CCW_CONFIG_REGION_INDEX, 212 VFIO_CCW_NUM_REGIONS 213 }; 214 enum { 215 VFIO_CCW_IO_IRQ_INDEX, 216 VFIO_CCW_CRW_IRQ_INDEX, 217 VFIO_CCW_REQ_IRQ_INDEX, 218 VFIO_CCW_NUM_IRQS 219 }; 220 struct vfio_pci_dependent_device { 221 __u32 group_id; 222 __u16 segment; 223 __u8 bus; 224 __u8 devfn; 225 }; 226 struct vfio_pci_hot_reset_info { 227 __u32 argsz; 228 __u32 flags; 229 __u32 count; 230 struct vfio_pci_dependent_device devices[]; 231 }; 232 #define VFIO_DEVICE_GET_PCI_HOT_RESET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 233 struct vfio_pci_hot_reset { 234 __u32 argsz; 235 __u32 flags; 236 __u32 count; 237 __s32 group_fds[]; 238 }; 239 #define VFIO_DEVICE_PCI_HOT_RESET _IO(VFIO_TYPE, VFIO_BASE + 13) 240 struct vfio_device_gfx_plane_info { 241 __u32 argsz; 242 __u32 flags; 243 #define VFIO_GFX_PLANE_TYPE_PROBE (1 << 0) 244 #define VFIO_GFX_PLANE_TYPE_DMABUF (1 << 1) 245 #define VFIO_GFX_PLANE_TYPE_REGION (1 << 2) 246 __u32 drm_plane_type; 247 __u32 drm_format; 248 __u64 drm_format_mod; 249 __u32 width; 250 __u32 height; 251 __u32 stride; 252 __u32 size; 253 __u32 x_pos; 254 __u32 y_pos; 255 __u32 x_hot; 256 __u32 y_hot; 257 union { 258 __u32 region_index; 259 __u32 dmabuf_id; 260 }; 261 }; 262 #define VFIO_DEVICE_QUERY_GFX_PLANE _IO(VFIO_TYPE, VFIO_BASE + 14) 263 #define VFIO_DEVICE_GET_GFX_DMABUF _IO(VFIO_TYPE, VFIO_BASE + 15) 264 struct vfio_device_ioeventfd { 265 __u32 argsz; 266 __u32 flags; 267 #define VFIO_DEVICE_IOEVENTFD_8 (1 << 0) 268 #define VFIO_DEVICE_IOEVENTFD_16 (1 << 1) 269 #define VFIO_DEVICE_IOEVENTFD_32 (1 << 2) 270 #define VFIO_DEVICE_IOEVENTFD_64 (1 << 3) 271 #define VFIO_DEVICE_IOEVENTFD_SIZE_MASK (0xf) 272 __u64 offset; 273 __u64 data; 274 __s32 fd; 275 }; 276 #define VFIO_DEVICE_IOEVENTFD _IO(VFIO_TYPE, VFIO_BASE + 16) 277 struct vfio_device_feature { 278 __u32 argsz; 279 __u32 flags; 280 #define VFIO_DEVICE_FEATURE_MASK (0xffff) 281 #define VFIO_DEVICE_FEATURE_GET (1 << 16) 282 #define VFIO_DEVICE_FEATURE_SET (1 << 17) 283 #define VFIO_DEVICE_FEATURE_PROBE (1 << 18) 284 __u8 data[]; 285 }; 286 #define VFIO_DEVICE_FEATURE _IO(VFIO_TYPE, VFIO_BASE + 17) 287 #define VFIO_DEVICE_FEATURE_PCI_VF_TOKEN (0) 288 struct vfio_iommu_type1_info { 289 __u32 argsz; 290 __u32 flags; 291 #define VFIO_IOMMU_INFO_PGSIZES (1 << 0) 292 #define VFIO_IOMMU_INFO_CAPS (1 << 1) 293 __u64 iova_pgsizes; 294 __u32 cap_offset; 295 }; 296 #define VFIO_IOMMU_TYPE1_INFO_CAP_IOVA_RANGE 1 297 struct vfio_iova_range { 298 __u64 start; 299 __u64 end; 300 }; 301 struct vfio_iommu_type1_info_cap_iova_range { 302 struct vfio_info_cap_header header; 303 __u32 nr_iovas; 304 __u32 reserved; 305 struct vfio_iova_range iova_ranges[]; 306 }; 307 #define VFIO_IOMMU_TYPE1_INFO_CAP_MIGRATION 2 308 struct vfio_iommu_type1_info_cap_migration { 309 struct vfio_info_cap_header header; 310 __u32 flags; 311 __u64 pgsize_bitmap; 312 __u64 max_dirty_bitmap_size; 313 }; 314 #define VFIO_IOMMU_TYPE1_INFO_DMA_AVAIL 3 315 struct vfio_iommu_type1_info_dma_avail { 316 struct vfio_info_cap_header header; 317 __u32 avail; 318 }; 319 #define VFIO_IOMMU_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 320 struct vfio_iommu_type1_dma_map { 321 __u32 argsz; 322 __u32 flags; 323 #define VFIO_DMA_MAP_FLAG_READ (1 << 0) 324 #define VFIO_DMA_MAP_FLAG_WRITE (1 << 1) 325 #define VFIO_DMA_MAP_FLAG_VADDR (1 << 2) 326 __u64 vaddr; 327 __u64 iova; 328 __u64 size; 329 }; 330 #define VFIO_IOMMU_MAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 13) 331 struct vfio_bitmap { 332 __u64 pgsize; 333 __u64 size; 334 __u64 __user * data; 335 }; 336 struct vfio_iommu_type1_dma_unmap { 337 __u32 argsz; 338 __u32 flags; 339 #define VFIO_DMA_UNMAP_FLAG_GET_DIRTY_BITMAP (1 << 0) 340 #define VFIO_DMA_UNMAP_FLAG_ALL (1 << 1) 341 #define VFIO_DMA_UNMAP_FLAG_VADDR (1 << 2) 342 __u64 iova; 343 __u64 size; 344 __u8 data[]; 345 }; 346 #define VFIO_IOMMU_UNMAP_DMA _IO(VFIO_TYPE, VFIO_BASE + 14) 347 #define VFIO_IOMMU_ENABLE _IO(VFIO_TYPE, VFIO_BASE + 15) 348 #define VFIO_IOMMU_DISABLE _IO(VFIO_TYPE, VFIO_BASE + 16) 349 struct vfio_iommu_type1_dirty_bitmap { 350 __u32 argsz; 351 __u32 flags; 352 #define VFIO_IOMMU_DIRTY_PAGES_FLAG_START (1 << 0) 353 #define VFIO_IOMMU_DIRTY_PAGES_FLAG_STOP (1 << 1) 354 #define VFIO_IOMMU_DIRTY_PAGES_FLAG_GET_BITMAP (1 << 2) 355 __u8 data[]; 356 }; 357 struct vfio_iommu_type1_dirty_bitmap_get { 358 __u64 iova; 359 __u64 size; 360 struct vfio_bitmap bitmap; 361 }; 362 #define VFIO_IOMMU_DIRTY_PAGES _IO(VFIO_TYPE, VFIO_BASE + 17) 363 struct vfio_iommu_spapr_tce_ddw_info { 364 __u64 pgsizes; 365 __u32 max_dynamic_windows_supported; 366 __u32 levels; 367 }; 368 struct vfio_iommu_spapr_tce_info { 369 __u32 argsz; 370 __u32 flags; 371 #define VFIO_IOMMU_SPAPR_INFO_DDW (1 << 0) 372 __u32 dma32_window_start; 373 __u32 dma32_window_size; 374 struct vfio_iommu_spapr_tce_ddw_info ddw; 375 }; 376 #define VFIO_IOMMU_SPAPR_TCE_GET_INFO _IO(VFIO_TYPE, VFIO_BASE + 12) 377 struct vfio_eeh_pe_err { 378 __u32 type; 379 __u32 func; 380 __u64 addr; 381 __u64 mask; 382 }; 383 struct vfio_eeh_pe_op { 384 __u32 argsz; 385 __u32 flags; 386 __u32 op; 387 union { 388 struct vfio_eeh_pe_err err; 389 }; 390 }; 391 #define VFIO_EEH_PE_DISABLE 0 392 #define VFIO_EEH_PE_ENABLE 1 393 #define VFIO_EEH_PE_UNFREEZE_IO 2 394 #define VFIO_EEH_PE_UNFREEZE_DMA 3 395 #define VFIO_EEH_PE_GET_STATE 4 396 #define VFIO_EEH_PE_STATE_NORMAL 0 397 #define VFIO_EEH_PE_STATE_RESET 1 398 #define VFIO_EEH_PE_STATE_STOPPED 2 399 #define VFIO_EEH_PE_STATE_STOPPED_DMA 4 400 #define VFIO_EEH_PE_STATE_UNAVAIL 5 401 #define VFIO_EEH_PE_RESET_DEACTIVATE 5 402 #define VFIO_EEH_PE_RESET_HOT 6 403 #define VFIO_EEH_PE_RESET_FUNDAMENTAL 7 404 #define VFIO_EEH_PE_CONFIGURE 8 405 #define VFIO_EEH_PE_INJECT_ERR 9 406 #define VFIO_EEH_PE_OP _IO(VFIO_TYPE, VFIO_BASE + 21) 407 struct vfio_iommu_spapr_register_memory { 408 __u32 argsz; 409 __u32 flags; 410 __u64 vaddr; 411 __u64 size; 412 }; 413 #define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17) 414 #define VFIO_IOMMU_SPAPR_UNREGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 18) 415 struct vfio_iommu_spapr_tce_create { 416 __u32 argsz; 417 __u32 flags; 418 __u32 page_shift; 419 __u32 __resv1; 420 __u64 window_size; 421 __u32 levels; 422 __u32 __resv2; 423 __u64 start_addr; 424 }; 425 #define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19) 426 struct vfio_iommu_spapr_tce_remove { 427 __u32 argsz; 428 __u32 flags; 429 __u64 start_addr; 430 }; 431 #define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20) 432 #endif 433