1/*
2 * Copyright (c) 1997 Mark Brinicombe
3 * Copyright (C) 2010 The Android Open Source Project
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the following acknowledgement:
16 *	This product includes software developed by Mark Brinicombe
17 * 4. Neither the name of the University nor the names of its contributors
18 *    may be used to endorse or promote products derived from this software
19 *    without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 */
33
34#include <private/bionic_asm.h>
35
36// According to the ARM AAPCS document, we only need to save
37// the following registers:
38//
39//  Core   r4-r11, sp, lr
40//    AAPCS 5.1.1:
41//      A subroutine must preserve the contents of the registers r4-r8, r10, r11
42//      and SP (and r9 in PCS variants that designate r9 as v6).
43//
44//  VFP    d8-d15
45//    AAPCS 5.1.2.1:
46//      Registers s16-s31 (d8-d15, q4-q7) must be preserved across subroutine
47//      calls; registers s0-s15 (d0-d7, q0-q3) do not need to be preserved
48//      (and can be used for passing arguments or returning results in standard
49//      procedure-call variants). Registers d16-d31 (q8-q15), if present, do
50//      not need to be preserved.
51//
52//  FPSCR  saved because glibc does.
53
54// The internal structure of a jmp_buf is totally private.
55// Current layout (changes from release to release):
56//
57// word   name            description
58// 0      sigflag/cookie  setjmp cookie in top 31 bits, signal mask flag in low bit
59// 1      sigmask         64-bit signal mask (not used with _setjmp / _longjmp)
60// 2      "               "
61// 3      reserved        (unused to allow float_base to be maximally aligned;
62//                        this avoids software emulation of unaligned loads/stores)
63// 4      float_base      base of float registers (d8 to d15)
64// 20     float_state     floating-point status and control register
65// 21     core_base       base of core registers (r4-r11, r13-r14)
66// 31     checksum        checksum of all of the core registers, to give better error messages
67// 32     reserved        reserved entries (room to grow)
68// ...
69// 63     "               "
70
71#define _JB_SIGFLAG     0
72#define _JB_SIGMASK     (_JB_SIGFLAG + 1)
73#define _JB_FLOAT_BASE  (_JB_SIGMASK + 3)
74#define _JB_FLOAT_STATE (_JB_FLOAT_BASE + (15-8+1)*2)
75#define _JB_CORE_BASE   (_JB_FLOAT_STATE+1)
76#define _JB_CHECKSUM    (_JB_CORE_BASE+10)
77
78ENTRY(setjmp)
79__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(setjmp)
80  mov r1, #1
81  b sigsetjmp
82END(setjmp)
83
84ENTRY(_setjmp)
85__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(_setjmp)
86  mov r1, #0
87  b sigsetjmp
88END(_setjmp)
89
90.macro m_calculate_checksum dst, src, scratch
91  mov \dst, #0
92  .irp i,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28
93    ldr \scratch, [\src, #(\i * 4)]
94    eor \dst, \dst, \scratch
95  .endr
96.endm
97
98// int sigsetjmp(sigjmp_buf env, int save_signal_mask);
99ENTRY(sigsetjmp)
100__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(sigsetjmp)
101  stmfd sp!, {r0, lr}
102  .cfi_def_cfa_offset 8
103  .cfi_rel_offset r0, 0
104  .cfi_rel_offset lr, 4
105
106  mov r0, r1
107  bl __bionic_setjmp_cookie_get
108  mov r1, r0
109
110  ldmfd sp, {r0}
111
112  // Save the setjmp cookie for later.
113  bic r2, r1, #1
114  stmfd sp!, {r2}
115  .cfi_adjust_cfa_offset 4
116
117  // Record the setjmp cookie and whether or not we're saving the signal mask.
118  str r1, [r0, #(_JB_SIGFLAG * 4)]
119
120  // Do we need to save the signal mask?
121  tst r1, #1
122  beq 1f
123
124  // Align the stack.
125  sub sp, #4
126  .cfi_adjust_cfa_offset 4
127
128  // Save the current signal mask.
129  add r2, r0, #(_JB_SIGMASK * 4)
130  mov r0, #2 // SIG_SETMASK
131  mov r1, #0
132  bl sigprocmask64
133
134  // Unalign the stack.
135  add sp, #4
136  .cfi_adjust_cfa_offset -4
137
1381:
139  ldmfd sp!, {r2}
140  .cfi_adjust_cfa_offset -4
141  ldmfd sp!, {r0, lr}
142  .cfi_adjust_cfa_offset -8
143  .cfi_restore r0
144  .cfi_restore lr
145
146  // Save core registers.
147  add r1, r0, #(_JB_CORE_BASE * 4)
148  // Mangle the easy registers in-place, write them out in one go, and unmangle
149  // them again.
150  eor r4, r4, r2
151  eor r5, r5, r2
152  eor r6, r6, r2
153  eor r7, r7, r2
154  eor r8, r8, r2
155  eor r9, r9, r2
156  eor r10, r10, r2
157  eor r11, r11, r2
158  stmia r1, {r4-r11}
159  eor r4, r4, r2
160  eor r5, r5, r2
161  eor r6, r6, r2
162  eor r7, r7, r2
163  eor r8, r8, r2
164  eor r9, r9, r2
165  eor r10, r10, r2
166  eor r11, r11, r2
167  // We need to avoid invalid values in sp or lr (http://b/152210274).
168  eor r3, lr, r2
169  str r3, [r1, #(8 * 4)]
170  eor r3, sp, r2
171  str r3, [r1, #(9 * 4)]
172
173  // Save floating-point registers.
174  add r1, r0, #(_JB_FLOAT_BASE * 4)
175  vstmia  r1, {d8-d15}
176
177  // Save floating-point state.
178  fmrx r1, fpscr
179  str r1, [r0, #(_JB_FLOAT_STATE * 4)]
180
181  // Calculate the checksum.
182  m_calculate_checksum r12, r0, r2
183  str r12, [r0, #(_JB_CHECKSUM * 4)]
184
185  mov r0, #0
186  bx lr
187END(sigsetjmp)
188
189// void siglongjmp(sigjmp_buf env, int value);
190ENTRY(siglongjmp)
191__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(siglongjmp)
192  stmfd sp!, {r0, r1, lr}
193  .cfi_def_cfa_offset 12
194  .cfi_rel_offset r0, 0
195  .cfi_rel_offset r1, 4
196  .cfi_rel_offset lr, 8
197
198  // Check the checksum before doing anything.
199  m_calculate_checksum r12, r0, r3
200  ldr r2, [r0, #(_JB_CHECKSUM * 4)]
201  teq r2, r12
202  bne __bionic_setjmp_checksum_mismatch
203
204  // Fetch the signal flag.
205  ldr r1, [r0, #(_JB_SIGFLAG * 4)]
206
207  // Do we need to restore the signal mask?
208  ands r1, r1, #1
209  beq 1f
210
211  // Restore the signal mask.
212  mov r2, #0
213  add r1, r0, #(_JB_SIGMASK * 4)
214  mov r0, #2 // SIG_SETMASK
215  bl sigprocmask64
216
2171:
218  ldmfd sp!, {r0, r1, lr}
219  .cfi_adjust_cfa_offset -12
220  .cfi_restore r0
221  .cfi_restore r1
222  .cfi_restore lr
223
224  // Restore floating-point registers.
225  add r2, r0, #(_JB_FLOAT_BASE * 4)
226  vldmia r2, {d8-d15}
227
228  // Restore floating-point state.
229  ldr r2, [r0, #(_JB_FLOAT_STATE * 4)]
230  fmxr fpscr, r2
231
232  // Load the cookie.
233  ldr r3, [r0, #(_JB_SIGFLAG * 4)]
234  bic r3, r3, #1
235
236  // Restore core registers.
237  add r2, r0, #(_JB_CORE_BASE * 4)
238
239  // Do all the easy registers in one go.
240  ldmia r2, {r4-r11}
241  eor r4, r4, r3
242  eor r5, r5, r3
243  eor r6, r6, r3
244  eor r7, r7, r3
245  eor r8, r8, r3
246  eor r9, r9, r3
247  eor r10, r10, r3
248  eor r11, r11, r3
249  // We need to avoid invalid values in sp or lr (http://b/152210274).
250  ldr r0, [r2, #(8 * 4)]
251  eor lr, r0, r3
252  ldr r0, [r2, #(9 * 4)]
253  eor sp, r0, r3
254
255  // Save the return value/address and check the setjmp cookie.
256  stmfd sp!, {r1, lr}
257  .cfi_adjust_cfa_offset 8
258  .cfi_rel_offset lr, 4
259  mov r0, r3
260  bl __bionic_setjmp_cookie_check
261
262  // Restore return value/address.
263  ldmfd sp!, {r0, lr}
264  .cfi_adjust_cfa_offset -8
265  .cfi_restore lr
266
267  teq r0, #0
268  moveq r0, #1
269  bx lr
270END(siglongjmp)
271
272ALIAS_SYMBOL(longjmp, siglongjmp)
273__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(longjmp)
274ALIAS_SYMBOL(_longjmp, siglongjmp)
275__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(_longjmp)
276