1 /* 2 * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without modification, are permitted 5 * provided that the following conditions are met: 6 * * Redistributions of source code must retain the above copyright notice, this list of 7 * conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above copyright notice, this list of 9 * conditions and the following disclaimer in the documentation and/or other materials provided 10 * with the distribution. 11 * * Neither the name of The Linux Foundation nor the names of its contributors may be used to 12 * endorse or promote products derived from this software without specific prior written 13 * permission. 14 * 15 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 16 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 17 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 21 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 22 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 23 */ 24 25 #ifndef __HW_INFO_TYPES_H__ 26 #define __HW_INFO_TYPES_H__ 27 28 #include <stdint.h> 29 #include <core/display_interface.h> 30 #include <core/core_interface.h> 31 #include <utils/locker.h> 32 #include <utils/fence.h> 33 #include <utils/debug.h> 34 #include <bitset> 35 #include <map> 36 #include <memory> 37 #include <set> 38 #include <string> 39 #include <vector> 40 #include <utility> 41 42 namespace sdm { 43 using std::string; 44 using std::pair; 45 using std::vector; 46 47 const int kMaxSDELayers = 16; // Maximum number of layers that can be handled by MDP5 hardware 48 // in a given layer stack. 49 #define MAX_PLANES 4 50 #define MAX_DETAIL_ENHANCE_CURVE 3 51 #define MAJOR 28 52 #define MINOR 16 53 #define SDEVERSION(major, minor, hw_rev) ((major) << MAJOR) | ((minor) << MINOR) | (hw_rev) 54 55 // CSC Max Size 56 #define MAX_CSC_MATRIX_COEFF_SIZE 9 57 #define MAX_CSC_CLAMP_SIZE 6 58 #define MAX_CSC_BIAS_SIZE 3 59 60 #define MAX_SPLIT_COUNT 2 61 62 enum HWDeviceType { 63 kDeviceBuiltIn, 64 kDevicePluggable, 65 kDeviceVirtual, 66 kDeviceRotator, 67 kDeviceMax, 68 }; 69 70 enum HWBlockType { 71 kHWBuiltIn, 72 kHWPluggable, 73 kHWWriteback0, 74 kHWWriteback1, 75 kHWWriteback2, 76 kHWBlockMax 77 }; 78 79 enum HWDisplayMode { 80 kModeDefault, 81 kModeVideo, 82 kModeCommand, 83 }; 84 85 enum PipeType { 86 kPipeTypeUnused, 87 kPipeTypeVIG, 88 kPipeTypeRGB, 89 kPipeTypeDMA, 90 kPipeTypeCursor, 91 }; 92 93 enum HWSubBlockType { 94 kHWVIGPipe, 95 kHWRGBPipe, 96 kHWDMAPipe, 97 kHWCursorPipe, 98 kHWRotatorInput, 99 kHWRotatorOutput, 100 kHWWBIntfOutput, 101 kHWDestinationScalar, 102 kHWSubBlockMax, 103 }; 104 105 enum HWAlphaInterpolation { 106 kInterpolationPixelRepeat, 107 kInterpolationBilinear, 108 kInterpolation2D, 109 kInterpolationMax, 110 }; 111 112 enum HWBlendingFilter { 113 kBlendFilterCircular, 114 kBlendFilterSeparable, 115 kBlendFilterMax, 116 }; 117 118 enum HWPipeFlags { 119 kIGC = 1 << 0, 120 kMultiRect = 1 << 1, 121 kMultiRectParallelMode = 1 << 2, 122 kFlipVertical = 1 << 5, 123 kFlipHorizontal = 1 << 6, 124 kSecure = 1 << 7, 125 kDisplaySecure = 1 << 8, 126 kCameraSecure = 1 << 9, 127 kInterlaced = 1 << 10, 128 kUpdating = 1 < 11, 129 kSolidFill = 1 << 12, 130 kTonemap1d = 1 << 13, 131 kTonemap3d = 1 << 14, 132 }; 133 134 enum HWAVRModes { 135 kQsyncNone, // Disables Qsync. 136 kContinuousMode, // Mode to enable AVR feature for every frame. 137 kOneShotMode, // Mode to enable AVR feature for particular frame. 138 }; 139 140 enum HWTopology { 141 kUnknown, 142 kSingleLM, 143 kSingleLMDSC, 144 kDualLM, 145 kDualLMDSC, 146 kDualLMMerge, 147 kDualLMMergeDSC, 148 kDualLMDSCMerge, 149 kQuadLMMerge, 150 kQuadLMDSCMerge, 151 kQuadLMMergeDSC, 152 kPPSplit, 153 }; 154 155 enum HWMixerSplit { 156 kNoSplit, 157 kDualSplit, 158 kQuadSplit, 159 }; 160 161 enum HwHdrEotf { 162 kHdrEOTFInvalid = 0, 163 kHdrEOTFSDR = 0x1, 164 kHdrEOTFHdrLumRange = 0x2, 165 kHdrEOTFHDR10 = 0x4, 166 kHdrEOTFHLG = 0x8, 167 }; 168 169 enum HwColorspace { 170 kColorspaceXvycc601 = (1 << 0), 171 kColorspaceXvycc709 = (1 << 1), 172 kColorspaceSycc601 = (1 << 2), 173 kColorspaceAdobeycc601 = (1 << 3), 174 kColorspaceAdobergb = (1 << 4), 175 kColorspaceBt2020cycc = (1 << 5), 176 kColorspaceBt2020ycc = (1 << 6), 177 kColorspaceBt2020rgb = (1 << 7), 178 kColorspaceDcip3 = (1 << 15) 179 }; 180 181 enum HWSrcTonemap { 182 kSrcTonemapNone, 183 kSrcTonemap1d, // DMA 184 kSrcTonemap3d, // VIG 185 }; 186 187 enum HWToneMapLut { 188 kLutNone, // No valid lut 189 kDma1dIgc, // DMA IGC Lut 190 kDma1dGc, // DMA GC Lut 191 kVig1dIgc, // VIG IGC Lut 192 kVig3dGamut, // 3D Gamut Lut 193 }; 194 195 enum HWWriteOperation { 196 kNoOp, // No-op, previously set config holds good 197 kSet, // Sets the new config 198 kReset, // Resets/Clears the previously set config 199 }; 200 201 enum class HWRecoveryEvent : uint32_t { 202 kSuccess, // driver succeeded recovery 203 kCapture, // driver PP_TIMEOUT, capture logs 204 kDisplayPowerReset, // driver requesting display power cycle 205 }; 206 207 typedef std::map<HWSubBlockType, std::vector<LayerBufferFormat>> FormatsMap; 208 typedef std::map<LayerBufferFormat, float> CompRatioMap; 209 210 // Base Postprocessing features information. 211 class PPFeatureInfo { 212 public: 213 uint32_t enable_flags_ = 0; // bitmap to indicate subset of parameters enabling or not. 214 uint32_t feature_version_ = 0; 215 uint32_t feature_id_ = 0; 216 uint32_t disp_id_ = 0; 217 uint32_t pipe_id_ = 0; 218 ~PPFeatureInfo()219 virtual ~PPFeatureInfo() {} 220 virtual void *GetConfigData(void) const = 0; 221 }; 222 223 struct HWDynBwLimitInfo { 224 uint32_t cur_mode = kBwVFEOn; 225 uint64_t total_bw_limit[kBwModeMax] = { 0 }; 226 uint64_t pipe_bw_limit[kBwModeMax] = { 0 }; 227 }; 228 229 struct HWPipeCaps { 230 PipeType type = kPipeTypeUnused; 231 uint32_t id = 0; 232 uint32_t master_pipe_id = 0; 233 uint32_t max_rects = 1; 234 bool inverse_pma = 0; 235 uint32_t dgm_csc_version = 0; 236 std::map<HWToneMapLut, uint32_t> tm_lut_version_map = {}; 237 bool block_sec_ui = false; 238 }; 239 240 struct HWRotatorInfo { 241 uint32_t num_rotator = 0; 242 bool has_downscale = false; 243 std::string device_path = ""; 244 float min_downscale = 2.0f; 245 bool downscale_compression = false; 246 uint32_t max_line_width = 0; 247 }; 248 249 enum HWQseedStepVersion { 250 kQseed3v2, 251 kQseed3v3, 252 kQseed3v4, 253 kQseed3litev4, 254 kQseed3litev5, 255 }; 256 257 struct HWDestScalarInfo { 258 uint32_t count = 0; 259 uint32_t max_input_width = 0; 260 uint32_t max_output_width = 0; 261 uint32_t max_scale_up = 1; 262 uint32_t prefill_lines = 4; 263 }; 264 265 enum SmartDMARevision { 266 V1, 267 V2, 268 V2p5 269 }; 270 271 enum InlineRotationVersion { 272 kInlineRotationNone, 273 kInlineRotationV1, 274 kInlineRotationV2, 275 }; 276 277 struct InlineRotationInfo { 278 InlineRotationVersion inrot_version = kInlineRotationNone; 279 std::vector<LayerBufferFormat> inrot_fmts_supported; 280 float max_downscale_rt = 2.2f; // max downscale real time display 281 float max_ds_without_pre_downscaler = 2.2f; 282 }; 283 284 285 const int kPipeVigLimit = (1 << 0); 286 const int kPipeDmaLimit = (1 << 1); 287 const int kPipeScalingLimit = (1 << 2); 288 const int kPipeRotationLimit = (1 << 3); 289 290 struct HWResourceInfo { 291 uint32_t hw_version = 0; 292 uint32_t num_dma_pipe = 0; 293 uint32_t num_vig_pipe = 0; 294 uint32_t num_rgb_pipe = 0; 295 uint32_t num_cursor_pipe = 0; 296 uint32_t num_blending_stages = 0; 297 uint32_t num_solidfill_stages = 0; 298 uint32_t max_scale_up = 1; 299 uint32_t max_scale_down = 1; 300 uint64_t max_bandwidth_low = 0; 301 uint64_t max_bandwidth_high = 0; 302 uint32_t max_mixer_width = 2048; 303 uint32_t max_pipe_width = 2048; 304 uint32_t max_scaler_pipe_width = 2560; 305 uint32_t max_rotation_pipe_width = 1088; 306 uint32_t max_cursor_size = 0; 307 uint64_t max_pipe_bw = 0; 308 uint64_t max_pipe_bw_high = 0; 309 uint32_t max_sde_clk = 0; 310 float clk_fudge_factor = 1.0f; 311 uint32_t macrotile_nv12_factor = 0; 312 uint32_t macrotile_factor = 0; 313 uint32_t linear_factor = 0; 314 uint32_t scale_factor = 0; 315 uint32_t extra_fudge_factor = 0; 316 uint32_t amortizable_threshold = 0; 317 uint32_t system_overhead_lines = 0; 318 bool has_ubwc = false; 319 bool has_decimation = false; 320 bool has_non_scalar_rgb = false; 321 bool is_src_split = false; 322 bool separate_rotator = false; 323 bool has_qseed3 = false; 324 bool has_concurrent_writeback = false; 325 bool has_ppp = false; 326 bool has_excl_rect = false; 327 uint32_t writeback_index = kHWBlockMax; 328 HWDynBwLimitInfo dyn_bw_info; 329 std::vector<HWPipeCaps> hw_pipes; 330 FormatsMap supported_formats_map; 331 HWRotatorInfo hw_rot_info; 332 HWDestScalarInfo hw_dest_scalar_info; 333 bool has_hdr = false; 334 SmartDMARevision smart_dma_rev = SmartDMARevision::V1; 335 float ib_fudge_factor = 1.0f; 336 uint32_t undersized_prefill_lines = 0; 337 CompRatioMap comp_ratio_rt_map; 338 CompRatioMap comp_ratio_nrt_map; 339 uint32_t cache_size = 0; // cache size in bytes 340 HWQseedStepVersion pipe_qseed3_version = kQseed3v2; // only valid when has_qseed3=true 341 uint32_t min_prefill_lines = 0; 342 InlineRotationInfo inline_rot_info = {}; 343 std::bitset<32> src_tone_map = 0; //!< Stores the bit mask of src tone map capability 344 int secure_disp_blend_stage = -1; 345 uint32_t line_width_constraints_count = 0; 346 vector< pair <uint32_t, uint32_t> > line_width_limits; 347 vector< pair <uint32_t, uint32_t> > line_width_constraints; 348 uint32_t num_mnocports = 2; 349 uint32_t mnoc_bus_width = 32; 350 bool use_baselayer_for_stage = false; 351 bool has_micro_idle = false; 352 uint32_t ubwc_version = 1; 353 }; 354 355 struct HWSplitInfo { 356 uint32_t left_split = 0; 357 uint32_t right_split = 0; 358 359 bool operator !=(const HWSplitInfo &split_info) { 360 return ((left_split != split_info.left_split) || (right_split != split_info.right_split)); 361 } 362 363 bool operator ==(const HWSplitInfo &split_info) { 364 return !(operator !=(split_info)); 365 } 366 }; 367 368 struct HWColorPrimaries { 369 uint32_t white_point[2] = {}; // White point 370 uint32_t red[2] = {}; // Red color primary 371 uint32_t green[2] = {}; // Green color primary 372 uint32_t blue[2] = {}; // Blue color primary 373 }; 374 375 struct HWPanelOrientation { 376 bool rotation = false; 377 bool flip_horizontal = false; 378 bool flip_vertical = false; 379 }; 380 381 struct HWPanelInfo { 382 DisplayPort port = kPortDefault; // Display port 383 HWDisplayMode mode = kModeDefault; // Display mode 384 bool partial_update = false; // Partial update feature 385 int left_align = 1; // ROI left alignment restriction 386 int width_align = 1; // ROI width alignment restriction 387 int top_align = 1; // ROI top alignment restriction 388 int height_align = 1; // ROI height alignment restriction 389 int min_roi_width = 1; // Min width needed for ROI 390 int min_roi_height = 1; // Min height needed for ROI 391 bool needs_roi_merge = false; // Merge ROI's of both the DSI's 392 bool dynamic_fps = false; // Panel Supports dynamic fps 393 bool dfps_porch_mode = false; // dynamic fps VFP or HFP mode 394 bool ping_pong_split = false; // Supports Ping pong split 395 uint32_t min_fps = 0; // Min fps supported by panel 396 uint32_t max_fps = 0; // Max fps supported by panel 397 bool is_primary_panel = false; // Panel is primary display 398 bool is_pluggable = false; // Panel is pluggable 399 HWSplitInfo split_info; // Panel split configuration 400 char panel_name[256] = {0}; // Panel name 401 float panel_max_brightness = 255.0f; // Max panel brightness 402 float panel_min_brightness = 1.0f; // Min panel brightness 403 uint32_t left_roi_count = 1; // Number if ROI supported on left panel 404 uint32_t right_roi_count = 1; // Number if ROI supported on right panel 405 bool hdr_enabled = false; // HDR feature supported 406 bool hdr_plus_enabled = false; // HDR10+ feature supported 407 bool hdr_metadata_type_one = false; // Static HDR metadata type one 408 uint32_t hdr_eotf = 0; // Electro optical transfer function 409 float peak_luminance = 0.0f; // Panel's peak luminance level 410 float average_luminance = 0.0f; // Panel's average luminance level 411 float blackness_level = 0.0f; // Panel's blackness level 412 HWColorPrimaries primaries = {}; // WRGB color primaries 413 HWPanelOrientation panel_orientation = {}; // Panel Orientation 414 uint32_t transfer_time_us = 0; // transfer time in micro seconds to panel's active region 415 bool qsync_support = false; // Specifies panel supports qsync feature or not. 416 bool dyn_bitclk_support = false; // Bit clk can be updated to avoid RF interference. 417 std::vector<uint64_t> bitclk_rates; // Supported bit clk levels. 418 uint32_t supported_colorspaces = 0; // supported_colorspaces for DP displays. 419 420 bool operator !=(const HWPanelInfo &panel_info) { 421 return ((port != panel_info.port) || (mode != panel_info.mode) || 422 (partial_update != panel_info.partial_update) || 423 (left_align != panel_info.left_align) || (width_align != panel_info.width_align) || 424 (top_align != panel_info.top_align) || (height_align != panel_info.height_align) || 425 (min_roi_width != panel_info.min_roi_width) || 426 (min_roi_height != panel_info.min_roi_height) || 427 (needs_roi_merge != panel_info.needs_roi_merge) || 428 (dynamic_fps != panel_info.dynamic_fps) || (min_fps != panel_info.min_fps) || 429 (dfps_porch_mode != panel_info.dfps_porch_mode) || 430 (ping_pong_split != panel_info.ping_pong_split) || 431 (max_fps != panel_info.max_fps) || (is_primary_panel != panel_info.is_primary_panel) || 432 (split_info != panel_info.split_info) || 433 (left_roi_count != panel_info.left_roi_count) || 434 (right_roi_count != panel_info.right_roi_count) || 435 (transfer_time_us != panel_info.transfer_time_us) || 436 (qsync_support != panel_info.qsync_support) || 437 (dyn_bitclk_support != panel_info.dyn_bitclk_support) || 438 (bitclk_rates != panel_info.bitclk_rates)); 439 } 440 441 bool operator ==(const HWPanelInfo &panel_info) { 442 return !(operator !=(panel_info)); 443 } 444 }; 445 446 struct HWSessionConfig { 447 LayerRect src_rect {}; 448 LayerRect dst_rect {}; 449 uint32_t buffer_count = 0; 450 bool secure = false; 451 uint32_t frame_rate = 0; 452 LayerTransform transform; 453 bool secure_camera = false; 454 455 bool operator==(const HWSessionConfig& config) const { 456 return (src_rect == config.src_rect && 457 dst_rect == config.dst_rect && 458 buffer_count == config.buffer_count && 459 secure == config.secure && 460 frame_rate == config.frame_rate && 461 transform == config.transform && 462 secure_camera == config.secure_camera); 463 } 464 465 bool operator!=(const HWSessionConfig& config) const { 466 return !operator==(config); 467 } 468 }; 469 470 enum HWRotatorMode { 471 kRotatorNone, 472 kRotatorOffline, 473 kRotatorInline 474 }; 475 476 struct HWRotateInfo { 477 int pipe_id = -1; // Not actual pipe id, but the relative DMA id 478 int writeback_id = -1; // Writeback block id, but this is the same as DMA id 479 LayerRect src_roi {}; // Source crop of each split 480 LayerRect dst_roi {}; // Destination crop of each split 481 bool valid = false; 482 int rotate_id = -1; // Actual rotator session id with driver 483 }; 484 485 struct HWRotatorSession { 486 HWRotateInfo hw_rotate_info[kMaxRotatePerLayer] {}; 487 uint32_t hw_block_count = 0; // number of rotator hw blocks used by rotator session 488 int session_id = -1; // A handle with Session Manager 489 HWSessionConfig hw_session_config {}; 490 LayerBuffer input_buffer {}; // Input to rotator 491 LayerBuffer output_buffer {}; // Output of rotator, crop width and stride are same 492 float input_compression = 1.0f; 493 float output_compression = 1.0f; 494 bool is_buffer_cached = false; 495 HWRotatorMode mode = kRotatorNone; 496 }; 497 498 struct HWScaleLutInfo { 499 uint32_t dir_lut_size = 0; 500 uint32_t cir_lut_size = 0; 501 uint32_t sep_lut_size = 0; 502 uint64_t dir_lut = 0; 503 uint64_t cir_lut = 0; 504 uint64_t sep_lut = 0; 505 }; 506 507 struct HWDetailEnhanceData : DisplayDetailEnhancerData { 508 uint16_t prec_shift = 0; 509 int16_t adjust_a[MAX_DETAIL_ENHANCE_CURVE] = {0}; 510 int16_t adjust_b[MAX_DETAIL_ENHANCE_CURVE] = {0}; 511 int16_t adjust_c[MAX_DETAIL_ENHANCE_CURVE] = {0}; 512 }; 513 514 struct HWPixelExtension { 515 int32_t extension = 0; // Number of pixels extension in left, right, top and bottom directions 516 // for all color components. This pixel value for each color component 517 // should be sum of fetch and repeat pixels. 518 519 int32_t overfetch = 0; // Number of pixels need to be overfetched in left, right, top and bottom 520 // directions from source image for scaling. 521 522 int32_t repeat = 0; // Number of pixels need to be repeated in left, right, top and bottom 523 // directions for scaling. 524 }; 525 526 struct HWPlane { 527 int32_t init_phase_x = 0; 528 int32_t phase_step_x = 0; 529 int32_t init_phase_y = 0; 530 int32_t phase_step_y = 0; 531 HWPixelExtension left {}; 532 HWPixelExtension top {}; 533 HWPixelExtension right {}; 534 HWPixelExtension bottom {}; 535 uint32_t roi_width = 0; 536 int32_t preload_x = 0; 537 int32_t preload_y = 0; 538 uint32_t src_width = 0; 539 uint32_t src_height = 0; 540 }; 541 542 struct HWCsc { 543 int64_t ctm_coeff[MAX_CSC_MATRIX_COEFF_SIZE] = {0}; 544 uint32_t pre_bias[MAX_CSC_BIAS_SIZE] = {0}; 545 uint32_t post_bias[MAX_CSC_BIAS_SIZE] = {0}; 546 uint32_t pre_clamp[MAX_CSC_CLAMP_SIZE] = {0}; 547 uint32_t post_clamp[MAX_CSC_CLAMP_SIZE] = {0}; 548 }; 549 550 struct HWScaleData { 551 struct enable { 552 uint8_t scale = 0; 553 uint8_t direction_detection = 0; 554 uint8_t detail_enhance = 0; 555 uint8_t dyn_exp_disable = 0; // RGB format dynamic pixel expansion disable. 556 } enable; 557 uint32_t dst_width = 0; 558 uint32_t dst_height = 0; 559 uint32_t dir_weight = 0; 560 HWPlane plane[MAX_PLANES] {}; 561 // scale_v2_data fields 562 ScalingFilterConfig y_rgb_filter_cfg = kFilterEdgeDirected; 563 ScalingFilterConfig uv_filter_cfg = kFilterEdgeDirected; 564 HWAlphaInterpolation alpha_filter_cfg = kInterpolationPixelRepeat; 565 HWBlendingFilter blend_cfg = kBlendFilterCircular; 566 567 struct lut_flags { 568 uint8_t lut_swap = 0; 569 uint8_t lut_dir_wr = 0; 570 uint8_t lut_y_cir_wr = 0; 571 uint8_t lut_uv_cir_wr = 0; 572 uint8_t lut_y_sep_wr = 0; 573 uint8_t lut_uv_sep_wr = 0; 574 } lut_flag; 575 576 uint32_t dir_lut_idx = 0; 577 /* for Y(RGB) and UV planes*/ 578 uint32_t y_rgb_cir_lut_idx = 0; 579 uint32_t uv_cir_lut_idx = 0; 580 uint32_t y_rgb_sep_lut_idx = 0; 581 uint32_t uv_sep_lut_idx = 0; 582 HWDetailEnhanceData detail_enhance {}; 583 584 uint32_t src_x_pre_down_scale_0 = 0; 585 uint32_t src_x_pre_down_scale_1 = 0; 586 uint32_t src_y_pre_down_scale_0 = 0; 587 uint32_t src_y_pre_down_scale_1 = 0; 588 }; 589 590 struct HWDestScaleInfo { 591 uint32_t mixer_width = 0; 592 uint32_t mixer_height = 0; 593 bool scale_update = false; 594 HWScaleData scale_data = {}; 595 LayerRect panel_roi = {}; 596 }; 597 598 typedef std::map<uint32_t, HWDestScaleInfo *> DestScaleInfoMap; 599 600 struct HWAVRInfo { 601 bool update = false; // Update avr setting. 602 HWAVRModes mode = kContinuousMode; // Specifies the AVR mode 603 }; 604 605 struct HWPipeCscInfo { 606 HWWriteOperation op = kNoOp; 607 HWCsc csc = {}; 608 }; 609 610 struct HWPipeTonemapLutInfo { 611 HWWriteOperation op = kNoOp; 612 HWToneMapLut type = kLutNone; 613 std::shared_ptr<PPFeatureInfo> pay_load = nullptr; 614 }; 615 616 struct HWPipeTonemapInversePma { 617 HWWriteOperation op = kNoOp; 618 bool inverse_pma = false; 619 }; 620 621 struct HWPipeInfo { 622 HWPipeInfo *pair = NULL; 623 uint8_t rect = 255; 624 uint32_t pipe_id = 0; 625 HWSubBlockType sub_block_type = kHWSubBlockMax; 626 LayerRect src_roi {}; 627 LayerRect dst_roi {}; 628 LayerRect excl_rect {}; // exclusion rectangle per pipe rectangle 629 uint8_t horizontal_decimation = 0; 630 uint8_t vertical_decimation = 0; 631 HWScaleData scale_data {}; 632 uint32_t z_order = 0; 633 uint32_t flags = 0; 634 bool valid = false; 635 bool is_virtual = 0; 636 HWPipeTonemapInversePma inverse_pma_info = {}; 637 HWPipeCscInfo dgm_csc_info = {}; 638 std::vector<HWPipeTonemapLutInfo> lut_info = {}; 639 LayerTransform transform; 640 HWSrcTonemap tonemap = kSrcTonemapNone; 641 LayerBufferFormat format = kFormatARGB8888; // src format of the buffer 642 bool is_solid_fill = false; 643 }; 644 645 struct HWSolidfillStage { 646 uint32_t z_order = kMaxSDELayers; 647 uint32_t color = 0; 648 LayerRect roi = {}; 649 bool is_exclusion_rect = false; 650 LayerSolidFill solid_fill_info = {}; 651 }; 652 653 struct HWLayerConfig { 654 HWPipeInfo left_pipe {}; // pipe for left side of output 655 HWPipeInfo right_pipe {}; // pipe for right side of output 656 HWRotatorSession hw_rotator_session {}; 657 bool use_inline_rot = false; // keep track of which layers inline rotation 658 HWSolidfillStage hw_solidfill_stage {}; 659 float compression = 1.0f; 660 bool use_solidfill_stage = false; 661 }; 662 663 struct HWHDRLayerInfo { 664 enum HDROperation { 665 kNoOp, // No-op. 666 kSet, // Sets the HDR MetaData - Start of HDR 667 kReset, // resets the previously set HDR Metadata, End of HDR 668 }; 669 670 int32_t layer_index = -1; 671 HDROperation operation = kNoOp; 672 bool in_hdr_mode = false; // True if already in HDR mode with static metadata. 673 bool blend_space_layer_changed = false; // True if HDR layer's index changed. 674 std::set<uint32_t> hdr_layers; // Non-tonemapped HDR layer indices. 675 std::vector<uint8_t> dyn_hdr_vsif_payload; // Dynamic HDR VSIF data. 676 }; 677 678 struct LayerExt { 679 std::vector<LayerRect> excl_rects = {}; // list of exclusion rects 680 }; 681 682 struct HWLayersInfo { 683 LayerStack *stack = NULL; // Input layer stack. Set by the caller. 684 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0. 685 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present. 686 uint32_t stitch_target_index = 0; // Blit target layer index. 0 if not present. 687 std::vector<ColorPrimaries> wide_color_primaries = {}; // list of wide color primaries 688 689 std::vector<Layer> hw_layers = {}; // Layers which need to be programmed on the HW 690 std::vector<LayerExt> layer_exts = {}; // Extention layer having list of 691 // exclusion rectangles for each layer 692 std::vector<uint32_t> index {}; // Indexes of the layers from the layer stack which need to 693 // be programmed on hardware. 694 std::vector<uint32_t> roi_index {}; // Stores the ROI index where the layers are visible. 695 shared_ptr<Fence> sync_handle = nullptr; // Release fence id for current draw cycle. 696 int set_idle_time_ms = -1; // Set idle time to the new specified value. 697 // -1 indicates no change in idle time since last set value. 698 std::vector<LayerRect> left_frame_roi = {}; // Left ROI. 699 std::vector<LayerRect> right_frame_roi = {}; // Right ROI. 700 LayerRect partial_fb_roi = {}; // Damaged area in framebuffer. 701 bool roi_split = false; // Indicates separated left and right ROI 702 bool async_cursor_updates = false; // Cursor layer allowed to have async updates 703 bool fast_path_composition = false; // Indicates frame has fast path composition 704 DestScaleInfoMap dest_scale_info_map = {}; 705 HWHDRLayerInfo hdr_layer_info = {}; 706 Handle pvt_data = NULL; // Private data used by sdm extension only. 707 bool game_present = false; // Indicates there is game layer or not 708 }; 709 710 struct HWQosData { 711 uint64_t core_ab_bps = 0; 712 uint64_t core_ib_bps = 0; 713 uint64_t llcc_ab_bps = 0; 714 uint64_t llcc_ib_bps = 0; 715 uint64_t dram_ab_bps = 0; 716 uint64_t dram_ib_bps = 0; 717 uint64_t rot_prefill_bw_bps = 0; 718 uint32_t clock_hz = 0; 719 uint32_t rot_clock_hz = 0; 720 }; 721 722 enum UpdateType { 723 kUpdateResources, // Indicates Strategy & RM execution, which can update resources. 724 kSwapBuffers, // Indicates Strategy & RM execution, which can update buffer handler and crop. 725 kUpdateMax, 726 }; 727 728 struct HWLayers { 729 HWLayersInfo info {}; 730 HWLayerConfig config[kMaxSDELayers] {}; 731 float output_compression = 1.0f; 732 HWQosData qos_data = {}; 733 HWAVRInfo hw_avr_info = {}; 734 std::bitset<kUpdateMax> updates_mask = 0; 735 uint64_t elapse_timestamp = 0; 736 }; 737 738 struct HWDisplayAttributes : DisplayConfigVariableInfo { 739 bool is_device_split = false; 740 uint32_t v_front_porch = 0; //!< Vertical front porch of panel 741 uint32_t v_back_porch = 0; //!< Vertical back porch of panel 742 uint32_t v_pulse_width = 0; //!< Vertical pulse width of panel 743 uint32_t h_total = 0; //!< Total width of panel (hActive + hFP + hBP + hPulseWidth) 744 uint32_t v_total = 0; //!< Total height of panel (vActive + vFP + vBP + vPulseWidth) 745 uint32_t clock_khz = 0; //!< Stores the pixel clock of panel in khz 746 HWTopology topology = kUnknown; //!< Stores the topology information. 747 748 bool operator !=(const HWDisplayAttributes &display_attributes) { 749 return ((is_device_split != display_attributes.is_device_split) || 750 (x_pixels != display_attributes.x_pixels) || 751 (y_pixels != display_attributes.y_pixels) || 752 (x_dpi != display_attributes.x_dpi) || 753 (y_dpi != display_attributes.y_dpi) || 754 (fps != display_attributes.fps) || 755 (vsync_period_ns != display_attributes.vsync_period_ns) || 756 (v_front_porch != display_attributes.v_front_porch) || 757 (v_back_porch != display_attributes.v_back_porch) || 758 (v_pulse_width != display_attributes.v_pulse_width) || 759 (h_total != display_attributes.h_total) || 760 (is_yuv != display_attributes.is_yuv) || 761 (clock_khz != display_attributes.clock_khz) || 762 (topology != display_attributes.topology)); 763 } 764 765 bool operator ==(const HWDisplayAttributes &display_attributes) { 766 return !(operator !=(display_attributes)); 767 } 768 OnlyFpsChangedHWDisplayAttributes769 bool OnlyFpsChanged(const HWDisplayAttributes &display_attributes) { 770 return ((fps != display_attributes.fps) && 771 (vsync_period_ns != display_attributes.vsync_period_ns) && 772 (x_pixels == display_attributes.x_pixels) && 773 (y_pixels == display_attributes.y_pixels) && 774 (x_dpi == display_attributes.x_dpi) && 775 (y_dpi == display_attributes.y_dpi) && 776 (topology == display_attributes.topology) && 777 (is_device_split == display_attributes.is_device_split) && 778 (v_front_porch == display_attributes.v_front_porch) && 779 (v_back_porch == display_attributes.v_back_porch) && 780 (v_pulse_width == display_attributes.v_pulse_width) && 781 (h_total == display_attributes.h_total) && 782 (is_yuv == display_attributes.is_yuv) && 783 (clock_khz == display_attributes.clock_khz)); 784 } 785 }; 786 787 struct HWMixerAttributes { 788 uint32_t width = 0; // Layer mixer width 789 uint32_t height = 0; // Layer mixer height 790 uint32_t split_left = 0; // Left portion of layer mixer 791 HWMixerSplit split_type = kNoSplit; // Mixer topology 792 LayerBufferFormat output_format = kFormatRGB101010; // Layer mixer output format 793 uint32_t dest_scaler_blocks_used = 0; // Count of dest scaler blocks used 794 795 bool operator !=(const HWMixerAttributes &mixer_attributes) { 796 return ((width != mixer_attributes.width) || 797 (height != mixer_attributes.height) || 798 (split_type != mixer_attributes.split_type) || 799 (output_format != mixer_attributes.output_format) || 800 (split_left != mixer_attributes.split_left) || 801 (dest_scaler_blocks_used != mixer_attributes.dest_scaler_blocks_used)); 802 } 803 804 bool operator ==(const HWMixerAttributes &mixer_attributes) { 805 return !(operator !=(mixer_attributes)); 806 } 807 IsValidHWMixerAttributes808 bool IsValid() { 809 return (width > 0 && height > 0); 810 } 811 }; 812 813 } // namespace sdm 814 815 #endif // __HW_INFO_TYPES_H__ 816 817