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Searched defs:HWLayersInfo (Results 1 – 7 of 7) sorted by relevance

/aosp12/hardware/qcom/display/msm8996/sdm/include/private/
H A Dhw_info_types.h413 struct HWLayersInfo { struct
434 HWLayersInfo info; argument
/aosp12/hardware/qcom/sm7250/display/sdm/include/private/
H A Dhw_info_types.h682 struct HWLayersInfo { struct
683 LayerStack *stack = NULL; // Input layer stack. Set by the caller.
684 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0.
685 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present.
686 uint32_t stitch_target_index = 0; // Blit target layer index. 0 if not present.
695 shared_ptr<Fence> sync_handle = nullptr; // Release fence id for current draw cycle.
696 int set_idle_time_ms = -1; // Set idle time to the new specified value.
701 bool roi_split = false; // Indicates separated left and right ROI
702 bool async_cursor_updates = false; // Cursor layer allowed to have async updates
703 bool fast_path_composition = false; // Indicates frame has fast path composition
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/aosp12/hardware/qcom/display/msm8909/sdm/include/private/
H A Dhw_info_types.h469 struct HWLayersInfo { struct
470 LayerStack *stack = NULL; // Input layer stack. Set by the caller.
471 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0.
472 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present.
497 HWLayersInfo info; argument
/aosp12/hardware/qcom/display/msm8909w_3100/sdm/include/private/
H A Dhw_info_types.h468 struct HWLayersInfo { struct
469 LayerStack *stack = NULL; // Input layer stack. Set by the caller.
470 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0.
471 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present.
496 HWLayersInfo info; argument
/aosp12/hardware/qcom/sdm845/display/sdm/include/private/
H A Dhw_info_types.h520 struct HWLayersInfo { struct
521 LayerStack *stack = NULL; // Input layer stack. Set by the caller.
522 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0.
523 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present.
527 int sync_handle = -1; // Release fence id for current draw cycle.
528 int set_idle_time_ms = -1; // Set idle time to the new specified value.
553 HWLayersInfo info {}; argument
/aosp12/hardware/qcom/display/msm8998/sdm/include/private/
H A Dhw_info_types.h461 struct HWLayersInfo { struct
462 LayerStack *stack = NULL; // Input layer stack. Set by the caller.
463 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0.
464 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present.
488 HWLayersInfo info; argument
/aosp12/hardware/qcom/sm8150/display/sdm/include/private/
H A Dhw_info_types.h664 struct HWLayersInfo { struct
665 LayerStack *stack = NULL; // Input layer stack. Set by the caller.
666 uint32_t app_layer_count = 0; // Total number of app layers. Must not be 0.
667 uint32_t gpu_target_index = 0; // GPU target layer index. 0 if not present.
676 int sync_handle = -1; // Release fence id for current draw cycle.
677 int set_idle_time_ms = -1; // Set idle time to the new specified value.
682 bool roi_split = false; // Indicates separated left and right ROI
683 bool async_cursor_updates = false; // Cursor layer allowed to have async updates
684 bool fast_path_composition = false; // Indicates frame has fast path composition
708 HWLayersInfo info {}; argument