Lines Matching refs:r3
20 mov r3, r0, lsr #8 @ r3<- CC
22 GET_VREG r1, r3 @ r1<- vCC
31 $instr @ $result<- op, r0-r3 changed
53 mov r3, rINST, lsr #12 @ r3<- B
55 GET_VREG r1, r3 @ r1<- vB
64 $instr @ $result<- op, r0-r3 changed
94 $instr @ $result<- op, r0-r3 changed
119 FETCH_S r3, 1 @ r3<- ssssCCBB (sign-extended for CC)
121 and r2, r3, #255 @ r2<- BB
130 $instr @ $result<- op, r0-r3 changed
156 mov r3, r0, lsr #8 @ r3<- CC
159 VREG_INDEX_TO_ADDR r3, r3 @ r3<- &fp[CC]
161 GET_VREG_WIDE_BY_ADDR r2, r3, r3 @ r2/r3<- vCC/vCC+1
163 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
169 $instr @ result<- op, r0-r3 changed
195 GET_VREG_WIDE_BY_ADDR r2, r3, r1 @ r2/r3<- vBB/vBB+1
198 orrs ip, r2, r3 @ second arg (r2-r3) is zero?
204 $instr @ result<- op, r0-r3 changed
220 mov r3, rINST, lsr #12 @ r3<- B
222 GET_VREG r0, r3 @ r0<- vB
225 $instr @ r0<- op, r0-r3 changed
243 mov r3, rINST, lsr #12 @ r3<- B
245 VREG_INDEX_TO_ADDR r3, r3 @ r3<- &fp[B]
246 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vB/vB+1
249 $instr @ r0<- op, r0-r3 changed
264 mov r3, rINST, lsr #12 @ r3<- B
266 VREG_INDEX_TO_ADDR r3, r3 @ r3<- &fp[B]
268 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vAA
272 $instr @ r0/r1<- op, r2-r3 changed
287 mov r3, rINST, lsr #12 @ r3<- B
289 GET_VREG r0, r3 @ r0<- vB
294 $instr @ r0<- op, r0-r3 changed
345 mov r3, r0, lsr #8 @ r3<- CC
347 VREG_INDEX_TO_ADDR r3, r3 @ r3<- &fp[CC]
349 GET_VREG_WIDE_BY_ADDR r2, r3, r3 @ r2/r3<- vCC/vCC+1
351 sbcs ip, r1, r3 @ Sets correct CCs for checking LT (but not EQ/NE)
374 mov r3, r0, lsr #8 @ r3<- CC
376 GET_VREG r1, r3 @ r1<- vCC
385 bl __aeabi_idiv @ r0<- op, r0-r3 changed
403 mov r3, rINST, lsr #12 @ r3<- B
405 GET_VREG r1, r3 @ r1<- vB
414 bl __aeabi_idiv @ r0<- op, r0-r3 changed
444 bl __aeabi_idiv @ r0<- op, r0-r3 changed
462 FETCH_S r3, 1 @ r3<- ssssCCBB (sign-extended for CC
464 and r2, r3, #255 @ r2<- BB
466 movs r1, r3, asr #8 @ r1<- ssssssCC (sign extended)
474 bl __aeabi_idiv @ r0<- op, r0-r3 changed
541 mov r3, r0, lsr #8 @ r3<- CC
543 VREG_INDEX_TO_ADDR r3, r3 @ r3<- &fp[CC]
545 GET_VREG_WIDE_BY_ADDR r2, r3, r3 @ r2/r3<- vCC/vCC+1
548 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
572 GET_VREG_WIDE_BY_ADDR r2, r3, r1 @ r2/r3<- vBB/vBB+1
576 mla r2, r0, r3, ip @ r2<- YxX + (ZxW)
629 mov r3, r0, lsr #8 @ r3<- CC
631 GET_VREG r1, r3 @ r1<- vCC
641 bl __aeabi_idivmod @ r1<- op, r0-r3 changed
661 mov r3, rINST, lsr #12 @ r3<- B
663 GET_VREG r1, r3 @ r1<- vB
673 bl __aeabi_idivmod @ r1<- op, r0-r3 changed
706 bl __aeabi_idivmod @ r1<- op, r0-r3 changed
726 FETCH_S r3, 1 @ r3<- ssssCCBB (sign-extended for CC)
728 and r2, r3, #255 @ r2<- BB
730 movs r1, r3, asr #8 @ r1<- ssssssCC (sign extended)
739 bl __aeabi_idivmod @ r1<- op, r0-r3 changed
780 and r3, r0, #255 @ r3<- BB
782 VREG_INDEX_TO_ADDR r3, r3 @ r3<- &fp[BB]
784 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vBB/vBB+1
789 rsb r3, r2, #32 @ r3<- 32 - r2
790 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
805 mov r3, rINST, lsr #12 @ r3<- B
807 GET_VREG r2, r3 @ r2<- vB
813 rsb r3, r2, #32 @ r3<- 32 - r2
814 orr r1, r1, r0, lsr r3 @ r1<- r1 | (r0 << (32-r2))
842 and r3, r0, #255 @ r3<- BB
844 VREG_INDEX_TO_ADDR r3, r3 @ r3<- &fp[BB]
846 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vBB/vBB+1
851 rsb r3, r2, #32 @ r3<- 32 - r2
852 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
867 mov r3, rINST, lsr #12 @ r3<- B
869 GET_VREG r2, r3 @ r2<- vB
875 rsb r3, r2, #32 @ r3<- 32 - r2
876 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
916 and r3, r0, #255 @ r3<- BB
918 VREG_INDEX_TO_ADDR r3, r3 @ r3<- &fp[BB]
920 GET_VREG_WIDE_BY_ADDR r0, r1, r3 @ r0/r1<- vBB/vBB+1
925 rsb r3, r2, #32 @ r3<- 32 - r2
926 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))
941 mov r3, rINST, lsr #12 @ r3<- B
943 GET_VREG r2, r3 @ r2<- vB
949 rsb r3, r2, #32 @ r3<- 32 - r2
950 orr r0, r0, r1, asl r3 @ r0<- r0 | (r1 << (32-r2))